DSP56F803EVM Freescale Semiconductor, DSP56F803EVM Datasheet - Page 25

KIT EVALUATION FOR DSP56F803

DSP56F803EVM

Manufacturer Part Number
DSP56F803EVM
Description
KIT EVALUATION FOR DSP56F803
Manufacturer
Freescale Semiconductor

Specifications of DSP56F803EVM

Processor To Be Evaluated
56F803
Data Bus Width
16 bit
Interface Type
RS-232, JTAG
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Freescale Semiconductor
Cumulative program
HV period
Program hold time
Address/data set up time
Address/data hold time
1. One cycle is equal to an erase program and read.
2. Thv is the cumulative high voltage programming time to the same row before next erase. The same address cannot be programmed
twice before next erase.
3. Parameters are guaranteed by design in smart programming mode and must be one cycle or greater.
*The Flash interface unit provides registers for the control of these parameters.
2
NVSTR
Operating Conditions:
IFREN
XADR
PROG
Characteristic
YADR
XE
DIN
YE
3
3
3
Table 3-7 Flash Timing Parameters (Continued)
Tnvs
Figure 3-4 Flash Program Cycle
Tpgs
V
SS
Symbol
= V
56F803 Technical Data, Rev. 16
T
T
T
T
pgh
adh
ads
Tprog
SSA
hv
= 0 V, V
DD
Min
Tads
= V
Thv
DDA
= 3.0–3.6V, T
Typ
Tadh
3
A
Max
= –40° to +85°C, C
Tpgh
Unit
ms
Flash Memory Characteristics
Tnvh
L
50pF
Trcv
Figure 3-4
Figure 3-4
Figure 3-4
Figure 3-4
Figure
25

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