DSP56F803EVM Freescale Semiconductor, DSP56F803EVM Datasheet - Page 46

KIT EVALUATION FOR DSP56F803

DSP56F803EVM

Manufacturer Part Number
DSP56F803EVM
Description
KIT EVALUATION FOR DSP56F803
Manufacturer
Freescale Semiconductor

Specifications of DSP56F803EVM

Processor To Be Evaluated
56F803
Data Bus Width
16 bit
Interface Type
RS-232, JTAG
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
3.14 JTAG Timing
46
TCK frequency of operation
TCK cycle time
TCK clock pulse width
TMS, TDI data set-up time
TMS, TDI data hold time
TCK low to TDO data valid
TCK low to TDO tri-state
TRST assertion time
DE assertion time
Operating Conditions:
1. Timing is both wait state and frequency dependent. For the values listed, T = clock cycle. For 80MHz
operation, T = 12.5ns.
2. TCK frequency of operation must be less than 1/8 the processor rate.
3. Parameters listed are guaranteed by design.
(Input)
TCK
V
M
= V
IL
+ (V
Characteristic
IH
Figure 3-28 Test Clock Input Timing Diagram
– V
2
V
IL
SS
)/2
V
= V
IH
SSA
Table 3-18 JTAG Timing
= 0 V, V
56F803 Technical Data, Rev. 16
DD
t
PW
= V
V
V
M
IL
DDA
= 3.0–3.6 V, T
Symbol
t
t
CY
TRST
t
f
t
t
t
t
t
t
PW
OP
DH
CY
DS
DV
TS
DE
A
1, 3
= –40° to +85°C, C
t
PW
Min
100
DC
0.4
1.2
V
50
50
4T
M
L
Max
26.6
23.5
10
Freescale Semiconductor
50pF, f
OP
= 80MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for DSP56F803EVM