DSP56F803EVM Freescale Semiconductor, DSP56F803EVM Datasheet - Page 41

KIT EVALUATION FOR DSP56F803

DSP56F803EVM

Manufacturer Part Number
DSP56F803EVM
Description
KIT EVALUATION FOR DSP56F803
Manufacturer
Freescale Semiconductor

Specifications of DSP56F803EVM

Processor To Be Evaluated
56F803
Data Bus Width
16 bit
Interface Type
RS-232, JTAG
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
3.10 Quadrature Decoder Timing
Freescale Semiconductor
Operating Conditions:
Operating Conditions:
Timer Inputs
Timer Outputs
Timer output high/low period
Quadrature input period
Quadrature input high/low period
Quadrature phase period
1.
2. Parameters listed are guaranteed by design.
1. In the formulas listed, T = clock cycle. For 80MHz operation, T = 12. ns. V
T
2. Parameters listed are guaranteed by design.
A
= –40° to +85°C, C
In the formulas listed, T = clock cycle. For 80MHz operation, T = 12.5ns.
Characteristic
Table 3-14 Quadrature Decoder Timing
V
V
P
P
L
SS
SS
IN
OUT
= V
= V
50pF.
SSA
SSA
Table 3-13 Timer Timing
Figure 3-22 Timer Timing
= 0 V, V
= 0 V, V
56F803 Technical Data, Rev. 16
Symbol
P
OUTHL
DD
DD
P
P
P
HL
PH
IN
= V
= V
DDA
DDA
= 3.0–3.6V, T
= 3.0–3.6V, T
8T+12
P
4T+6
2T+3
Min
OUTHL
1T
P
INHL
A
A
1, 2
= –40° to +85°C, C
= –40° to +85°C, C
P
P
INHL
OUTHL
SS
= 0 V, V
Max
1,2
DD
L
L
= 3.0 – 3.6V,
50pF, f
50pF, f
Quadrature Decoder Timing
Unit
ns
ns
ns
ns
OP
OP
= 80MHz
= 80MHz
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