DSP56F803EVM Freescale Semiconductor, DSP56F803EVM Datasheet - Page 51

KIT EVALUATION FOR DSP56F803

DSP56F803EVM

Manufacturer Part Number
DSP56F803EVM
Description
KIT EVALUATION FOR DSP56F803
Manufacturer
Freescale Semiconductor

Specifications of DSP56F803EVM

Processor To Be Evaluated
56F803
Data Bus Width
16 bit
Interface Type
RS-232, JTAG
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Please see www.freescale.com for the most current case outline.
Part 5 Design Considerations
5.1 Thermal Design Considerations
An estimation of the chip junction temperature, T
Where:
Historically, thermal resistance has been expressed as the sum of a junction-to-case thermal resistance and
a case-to-ambient thermal resistance:
Where:
R
change the case-to-ambient thermal resistance, R
the device, add a heat sink, change the mounting arrangement on the Printed Circuit Board (PCB), or
otherwise change the thermal dissipation capability of the area surrounding the device on the PCB. This
model is most useful for ceramic packages with heat sinks; some 90% of the heat flow is dissipated through
the case to the heat sink and out to the ambient environment. For ceramic packages, in situations where
the heat flow is split between a path to the case and an alternate path through the PCB, analysis of the
device thermal performance may need the additional modeling capability of a system level thermal
simulation tool.
The thermal performance of plastic packages is more dependent on the temperature of the PCB to which
the package is mounted. Again, if the estimations obtained from R
the thermal performance is adequate, a system level model may be appropriate.
Definitions:
A complicating factor is the existence of three common definitions for determining the junction-to-case
thermal resistance in plastic packages:
Freescale Semiconductor
θJC
is device-related and cannot be influenced by the user. The user controls the thermal environment to
T
R
P
R
R
R
Measure the thermal resistance from the junction to the outside surface of the package (case) closest to the
chip mounting area when that surface has a proper heat sink. This is done to minimize temperature variation
A
D
Equation 1:
θJA
Equation 2:
θJA
θJC
θCA
= ambient temperature °C
= power dissipation in package
= package junction-to-case thermal resistance °C/W
= package junction-to-ambient thermal resistance °C/W
= package junction-to-ambient thermal resistance °C/W
= package case-to-ambient thermal resistance °C/W
T
R
J
θJA
=
T
=
A
R
+
θJC
(
P
D
+
×
R
R
θCA
θJA
56F803 Technical Data, Rev. 16
)
θCA
J
, in °C can be obtained from the equation:
. For example, the user can change the air flow around
θJA
do not satisfactorily answer whether
Thermal Design Considerations
51

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