DSP56F803EVM Freescale Semiconductor, DSP56F803EVM Datasheet - Page 32

• Manufacturer Part Number: DSP56F803EVM
• Description: KIT EVALUATION FOR DSP56F803
• Manufacturer: Freescale Semiconductor

Specifications of DSP56F803EVM

• Processor To Be Evaluated: 56F803
• Data Bus Width: 16 bit
• Interface Type: RS-232, JTAG
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

3.7 Reset, Stop, Wait, Mode Select, and Interrupt Timing
32
RESET Assertion to Address, Data and Control
Signals High Impedance
Minimum RESET Assertion Duration
OMR Bit 6 = 0
OMR Bit 6 = 1
RESET De-assertion to First External Address Output
Note: During read-modify-write instructions and internal instructions, the address lines do not change state.
1. Timing is both wait state and frequency dependent. In the formulas listed, WS = the number of wait states and
T = Clock Period. For 80MHz operation, T = 12.5ns.
2. Parameters listed are guaranteed by design.
To calculate the required access time for an external memory for any frequency < 80Mhz, use this formula:
Top = Clock period @ desired operating frequency
WS = Number of wait states
Memory Access Time = (Top*WS) + (Top- 11.5)
(See Note)
A0–A15,
D0–D15
PS, DS
Operating Conditions:
Table 3-11 Reset, Stop, Wait, Mode Select, and Interrupt Timing
WR
RD
Characteristic
t
AWR
Figure 3-11 External Bus Asynchronous Timing
t
WRWR
t
WRD
2
V
t
DOS
SS
= V
56F803 Technical Data, Rev. 16
t
WR
SSA
= 0 V, V
Data Out
t
ARDA
Symbol
t
DD
WRRD
t
t
t
RDA
RAZ
RA
= V
DDA
t
DOH
= 3.0–3.6V, T
t
275,000T
AD
128T
Min
33T
—
t
ARDD
t
RD
A
Data In
= –40° to +85°C, C
Max
34T
21
—
—
t
RDD
t
t
RDRD
RDWR
Unit
Freescale Semiconductor
ns
ns
ns
ns
t
t
DRD
L
RDA
≤
1, 5
50pF
Figure 3-12
Figure 3-12
Figure 3-12
See Figure