MC56F8323EVM Freescale Semiconductor, MC56F8323EVM Datasheet - Page 111

KIT EVALUATION FOR MC56F8323

MC56F8323EVM

Manufacturer Part Number
MC56F8323EVM
Description
KIT EVALUATION FOR MC56F8323
Manufacturer
Freescale Semiconductor
Type
DSPr

Specifications of MC56F8323EVM

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC56F8322 and MC56F8323
Data Bus Width
16 bit
Interface Type
RS-232
For Use With/related Products
MC56F8322, MC56F8323
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
10.2.1
The 56F8323/56F8123 have two on-chip regulators. One supplies the PLL and has no external pins;
therefore, it has no external characteristics which must be guaranteed (other than proper operation of the
device). The second regulator supplies approximately 2.6V to the device’s core logic. This regulator
requires two external 2.2
tend to provide better performance tolerances. The output voltage can be measured directly on the V
pins. The specifications for this regulator are shown in
Freescale Semiconductor
Preliminary
1. No Output Switching (Output switching current can be estimated from I = CVf for each output)
RUN1_MAC
Wait3
Stop1
Stop2
Unloaded Output Voltage
(0mA Load)
Loaded Output Voltage
(200mA load)
Line Regulation @ 250mA load
(V
DD
Mode
33 ranges from 3.0V to 3.6V)
Voltage Regulator Specifications
Table 10-8 Current Consumption per Power Supply Pin (Typical)
Characteristic
I
DD_Core
110mA
700μA
100μA
55mA
μ
F, or greater, capacitors for proper operation. Ceramic and tantalum capacitors
On-Chip Regulator Disabled (OCR_DIS = High)
I
DD_IO
13μA
13μA
13μA
13μA
Table 10-9. Regulator Parameters
1
56F8323 Technical Data, Rev. 17
I
DD_ADC
25mA
35μA
V
V
V
0μA
0μA
Symbol
RNL
RL
R
I
DD_OSC_PLL
Table
2.25
2.25
2.25
2.5mA
2.5mA
360μA
145μA
Min
10-9.
• 60MHz Device Clock
• All peripheral clocks are enabled
• Continuous MAC instructions with
• ADC powered on and clocked
• 60MHz Device Clock
• All peripheral clocks are enabled
• ADC powered off
• 4MHz Device Clock
• All peripheral clocks are off
• Relaxation oscillator is on
• ADC powered off
• PLL powered off
• Relaxation oscillator is off
• All peripheral clocks are off
• ADC powered off
• PLL powered off
Typical
fetches from Data RAM
Test Conditions
2.75
2.75
2.75
Max
DC Electrical Characteristics
V
V
V
Unit
CAP
111

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