AT91SAM9R64-CU Atmel, AT91SAM9R64-CU Datasheet - Page 467

• Manufacturer Part Number: AT91SAM9R64-CU
• Description: MCU ARM9 64K SRAM 144-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9R64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 3 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 49
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 144LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

34.6.4
34.6.4.1
Figure 34-30. Connection of a Smart Card to the USART
34.6.4.2
6289C–ATARM–28-May-09
ISO7816 Mode
ISO7816 Mode Overview
Protocol T = 0
The USART features an ISO7816-compatible operating mode. This mode permits interfacing
with smart cards and Security Access Modules (SAM) communicating through an ISO7816 link.
Both T = 0 and T = 1 protocols defined by the ISO7816 specification are supported.
Setting the USART in ISO7816 mode is performed by writing the USART_MODE field in the
Mode Register (US_MR) to the value 0x4 for protocol T = 0 and to the value 0x5 for protocol T =
1.
The ISO7816 is a half duplex communication on only one bidirectional line. The baud rate is
determined by a division of the clock provided to the remote device (see
on page
The USART connects to a smart card as shown in
tional and the Baud Rate Generator feeds the ISO7816 clock on the SCK pin. As the TXD pin
becomes bidirectional, its output remains driven by the output of the transmitter but only when
the transmitter is active while its input is directed to the input of the receiver. The USART is con-
sidered as the master of the communication as it generates the clock.
When operating in ISO7816, either in T = 0 or T = 1 modes, the character format is fixed. The
configuration is 8 data bits, even parity and 1 or 2 stop bits, regardless of the values pro-
grammed in the CHRL, MODE9, PAR and CHMODE fields. MSBF can be used to transmit LSB
or MSB first. Parity Bit (PAR) can be used to transmit in normal or inverse mode. Refer to
“USART Mode Register” on page 479
The USART cannot operate concurrently in both receiver and transmitter modes as the commu-
nication is unidirectional at a time. It has to be configured according to the required mode by
enabling or disabling either the receiver or the transmitter as desired. Enabling both the receiver
and the transmitter at the same time in ISO7816 mode may lead to unpredictable results.
The ISO7816 specification defines an inverse transmission format. Data bits of the character
must be transmitted on the I/O line at their negative value. The USART does not support this for-
mat and the user has to perform an exclusive OR on the data before writing it in the Transmit
Holding Register (US_THR) or after reading it in the Receive Holding Register (US_RHR).
In T = 0 protocol, a character is made up of one start bit, eight data bits, one parity bit and one
guard time, which lasts two bit times. The transmitter shifts out the bits and does not drive the
I/O line during the guard time.
If no parity error is detected, the I/O line remains at 1 during the guard time and the transmitter
can continue with the transmission of the next character, as shown in
445).
USART
SCK
TXD
AT91SAM9R64/RL64 Preliminary
and
CLK
I/O
“PAR: Parity Type” on page
Smart
Figure
Card
34-30. The TXD line becomes bidirec-
Figure
480.
“Baud Rate Generator”
34-31.
467