AT91SAM9R64-CU Atmel, AT91SAM9R64-CU Datasheet - Page 882

• Manufacturer Part Number: AT91SAM9R64-CU
• Description: MCU ARM9 64K SRAM 144-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9R64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 3 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 49
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 144LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

47.2
47.2.1
47.2.1.1
47.2.1.2
47.2.2
47.2.2.1
47.2.3
47.2.3.1
882
AT91SAM9R64/RL64 Errata - Revision A Parts
AT91SAM9R64/RL64 Preliminary
Bus Matrix
DMA Controller
LCD
DEFAULT_MASTER functionality
FIXED_PRIORITY functionality
Transfer size is limited in some conditions
LCD Screen Shifting After a Reset
Refer to
The DEFAULT_MASTER functionality is not available for the following slaves:
None.
The FIXED_PRIORITY arbitration scheme is not available for the following slaves:
None.
DMA Controller may be frozen if BTSIZE field is too big.
Choose another transfer configuration.
When a FIFO underflow occurs, a reset of the DMA and FIFO pointers is necessary. Performing
the following sequence :
leads to reset DMA pointers but not FIFO pointers, the displayed image is shifted.
Apply the following sequence:
• Slave 2: USB Device High-Speed
• Slave 3: LCDC User Interface
• Slave 2: USB Device High-Speed
• Slave 3: LCDC User Interface
• Slave 5: Peripheral bridge
• BTSIZE is limited to 16383 (0x3FFF) when SRC_WIDTH = WORD and DST_WIDTH = BYTE
• BTSIZE is limited to 32767 (0x7FFF) when SRC_WIDTH = HALFWORD and DST_WIDTH =
• BTSIZE is limited to 32767 (0x7FFF) when SRC_WIDTH = WORD and DST_WIDTH =
• DMA disable
• Wait for DMABUSY
• DMA reset
• DMA enable
BYTE
HALF_WORD
Problem Fix/ Workaround
Problem Fix/ Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Section 47.1 “Marking” on page
881.
6289C–ATARM–28-May-09