AT91SAM9R64-CU Atmel, AT91SAM9R64-CU Datasheet - Page 631

MCU ARM9 64K SRAM 144-LFBGA

AT91SAM9R64-CU

Manufacturer Part Number
AT91SAM9R64-CU
Description
MCU ARM9 64K SRAM 144-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9R64-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
72K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
2-Wire, SPI, SSC, USART
Maximum Clock Frequency
240 MHz
Number Of Programmable I/os
118
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 3 Channel
Controller Family/series
AT91SAM9xxx
No. Of I/o's
49
Ram Memory Size
64KB
Cpu Speed
240MHz
No. Of Timers
3
Rohs Compliant
Yes
Package
144LFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
240 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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38.9
Table 38-6.
Note:
6289C–ATARM–28-May-09
0x100-0x124
0x38 - 0x3C
0x50-0xFC
Offset
0x0C
0x1C
0x2C
0x4C
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
0x30
0x34
0x40
0x44
0x48
MultiMedia Card Interface (MCI) User Interface
1. The response register can be read by N accesses at the same MCI_RSPR or at consecutive addresses (0x20 to 0x2C).
N depends on the size of the response.
Register Mapping
Register
Control Register
Mode Register
Data Timeout Register
SD/SDIO Card Register
Argument Register
Command Register
Block Register
Reserved
Response Register
Response Register
Response Register
Response Register
Receive Data Register
Transmit Data Register
Reserved
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Reserved
Reserved for the PDC
(1)
(1)
(1)
(1)
AT91SAM9R64/RL64 Preliminary
Register Name
MCI_CMDR
MCI_SDCR
MCI_ARGR
MCI_DTOR
MCI_RSPR
MCI_RSPR
MCI_RSPR
MCI_RSPR
MCI_BLKR
MCI_RDR
MCI_TDR
MCI_IMR
MCI_IER
MCI_IDR
MCI_MR
MCI_CR
MCI_SR
Read/Write
Read/write
Read/write
Read/write
Read/write
Read/write
Write
Write
Read
Read
Read
Read
Read
Write
Read
Write
Write
Read
0xC0E5
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
631

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