AT91SAM9R64-CU Atmel, AT91SAM9R64-CU Datasheet - Page 827

• Manufacturer Part Number: AT91SAM9R64-CU
• Description: MCU ARM9 64K SRAM 144-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9R64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 3 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 49
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 144LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

43.3
Table 43-1.
43.4
43.4.1
43.4.2
43.4.3
43.4.4
43.4.5
6289C–ATARM–28-May-09
Pin Name
VDDANA
TSADVREF
AD0X
AD1X
AD2Y
AD3Y
GPAD4 - GPAD5
TSADTRG
P
M
P
M
Signal Description
Product Dependencies
Power Management
Interrupt Sources
Analog Inputs
I/O Lines
Conversion Performances
TSADCC Pin Description
The TSADC controller is not continuously clocked. The programmer must first enable the
TSADC controller Clock in the Power Management Controller (PMC) before using the TSADC
controller. However, if the application does not require TSADC controller operations, the TSADC
controller clock can be stopped when not needed and be restarted later.
Configuring the TSADC controller does not require the TSADC controller clock to be enabled.
The TSADCC interrupt line is connected on one of the internal sources of the Advanced Inter-
rupt Controller. Using the TSADCC interrupt requires the AIC to be programmed first.
The analog input pins can be multiplexed with PIO lines. In this case, the assignment of the
TSADCC input is automatically done as soon as the corresponding channel is enabled by writing
the register TSADCC_CHER. By default, after reset, the PIO lines are configured as input with
its pull-up enabled and the TSADCC inputs are connected to the GND.
The pin TSADTRG may be shared with other peripheral functions through the PIO Controller. In
this case, the PIO Controller should be set accordingly to assign the pin TSADTRG to the
TSADCC function.
For performance and electrical characteristics of the TSADCC, see the section “Electrical Char-
acteristics” of the full datasheet.
Description
Analog power supply
Reference voltage
Analog input channel 0 or Touch Screen Top channel
Analog input channel 1 or Touch Screen Bottom channel
Analog input channel 2 or Touch Screen Right channel
Analog input channel 3 or Touch Screen Left channel
General-purpose analog input channels 4 to 5
External trigger
AT91SAM9R64/RL64 Preliminary
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