ADUC841BSZ62-5 Analog Devices Inc, ADUC841BSZ62-5 Datasheet - Page 11

IC ADC/DAC 12BIT W/MCU 52-MQFP

ADUC841BSZ62-5

Manufacturer Part Number
ADUC841BSZ62-5
Description
IC ADC/DAC 12BIT W/MCU 52-MQFP
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC8xxr
Datasheet

Specifications of ADUC841BSZ62-5

Core Size
8-Bit
Program Memory Size
62KB (62K x 8)
Core Processor
8052
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
DMA, PSM, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 8x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-MQFP, 52-PQFP
Controller Family/series
(8051) 8052
No. Of I/o's
32
Ram Memory Size
2.25KB
Cpu Speed
20MIPS
No. Of Timers
3
No. Of Pwm Channels
2
Embedded Interface Type
UART
Rohs Compliant
Yes
Cpu Family
ADuC8xx
Device Core
8052
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
I2C/SPI/UART
Total Internal Ram Size
2.25KB
# I/os (max)
34
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
On-chip Adc
8-chx12-bit
On-chip Dac
2-chx12-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
52
Package Type
MQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADUC841QSZ - KIT DEV FOR ADUC841 QUICK START
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

Available stocks

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Manufacturer
Quantity
Price
Part Number:
ADUC841BSZ62-5
Manufacturer:
Analog Devices Inc
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Part Number:
ADUC841BSZ62-5
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TERMINOLOGY
ADC SPECIFICATIONS
Integral Nonlinearity
The maximum deviation of any code from a straight line
passing through the endpoints of the ADC transfer function.
The endpoints of the transfer function are zero scale, a point
½ LSB below the first code transition, and full scale, a point
½ LSB above the last code transition.
Differential Nonlinearity
The difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
The deviation of the first code transition (0000 . . . 000) to
(0000 . . . 001) from the ideal, i.e., +½ LSB.
Gain Error
The deviation of the last code transition from the ideal AIN
voltage (Full Scale – ½ LSB) after the offset error has been
adjusted out.
Signal-to-(Noise + Distortion) Ratio
The measured ratio of signal to (noise + distortion) at the
output of the ADC. The signal is the rms amplitude of the
fundamental. Noise is the rms sum of all nonfundamental
signals up to half the sampling frequency (f
The ratio depends on the number of quantization levels in the
digitization process; the more levels, the smaller the quantization
noise. The theoretical signal-to-(noise + distortion) ratio for an
ideal N-bit converter with a sine wave input is given by
Thus for a 12-bit converter, this is 74 dB.
Total Harmonic Distortion (THD)
The ratio of the rms sum of the harmonics to the fundamental.
Signal-to-(Noise + Distortion) = (6.02N + 1.76) dB
S
/2), excluding dc.
Rev. 0 | Page 11 of 88
DAC SPECIFICATIONS
Relative Accuracy
Relative accuracy or endpoint linearity is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after
adjusting for zero error and full-scale error.
Voltage Output Settling Time
The amount of time it takes for the output to settle to a
specified level for a full-scale input change.
Digital-to-Analog Glitch Impulse
The amount of charge injected into the analog output when the
inputs change state. It is specified as the area of the glitch in nV-sec.
ADuC841/ADuC842/ADuC843

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