ST10F276-6QR3 STMicroelectronics, ST10F276-6QR3 Datasheet - Page 115

• Manufacturer Part Number: ST10F276-6QR3
• Description: MCU 16BIT 832K FLASH 144-PQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F276-6QR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 64MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 68K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

ST10F276E
19.4
Figure 31. Synchronous long hardware RESET (EA = 0)
1. If during the reset condition (RSTIN low), RPD voltage drops below the threshold voltage (about 2.5V for
2. Minimum RSTIN low pulse duration shall also be longer than 500ns to guarantee the pulse is not masked
3. 3 to 8 TCL depending on clock source selection.
Software reset
A software reset sequence can be triggered at any time by the protected SRST (software
reset) instruction. This instruction can be deliberately executed within a program, e.g. to
leave bootstrap loader mode, or on a hardware trap that reveals system failure.
On execution of the SRST instruction, the internal reset sequence is started. The
microcontroller behavior is the same as for a synchronous short reset, except that only bits
P0.12...P0.8 are latched at the end of the reset sequence, while previously latched, bits
P0.7...P0.2 are cleared (that is written at ‘1’).
A Software reset is always taken as synchronous: there is no influence on Software Reset
behavior with RPD status. In case Bidirectional Reset is selected, a Software Reset event
pulls RSTIN pin low: this occurs only if RPD is high; if RPD is low, RSTIN pin is not pulled
low even though Bidirectional Reset is selected.
Refer to
and
5V operation), the asynchronous reset is then immediately entered.
by the internal filter (refer to
36
RSTIN
RSTF
(After Filter)
P0[15:13]
P0[12:2]
P0[1:0]
ALE
RST
RSTOUT
RPD
for bidirectional.
Figure 32
≤ 500 ns
≥ 50 ns
4 TCL
and
200
2)
12 TCL
µ
Figure 33
A Discharge
Section
not transparent
≤ 500 ns
≥ 50 ns
1024+8 TCL
19.1).
for unidirectional SW reset timing, and to figures 34,
1024+8 TCL
not transparent
transparent
At this time RSTF is sampled LOW
so it is LONG reset
transparent
≤ 500 ns
≥ 50 ns
3..4 TCL
1)
3..8 TCL
V
RPD
> 2.5V Asynchronous Reset not entered
3)
not t.
not t.
not t.
8 TCL
System reset
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