ST10F276-6QR3 STMicroelectronics, ST10F276-6QR3 Datasheet - Page 197

• Manufacturer Part Number: ST10F276-6QR3
• Description: MCU 16BIT 832K FLASH 144-PQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F276-6QR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 64MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 68K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

ST10F276E
23.8.8
Due to this adaptation to the input clock, the frequency of f
locked to f
individual TCLs.
The timings listed in the
using the minimum TCL that is possible under the respective circumstances.
The real minimum value for TCL depends on the jitter of the PLL. The PLL tunes f
keep it locked on f
one TCL period.
This is especially important for bus cycles using wait states and e.g. for the operation of timers,
serial interfaces, etc. For all slower operations and longer periods (such as, for example, pulse
train generation or measurement, lower baud rates) the deviation caused by the PLL jitter is
negligible. Refer to
Voltage controlled oscillator
The ST10F276E implements a PLL which combines different levels of frequency dividers
with a Voltage Controlled Oscillator (VCO) working as frequency multiplier.
presents a detailed summary of the internal settings and VCO frequency.
Table 96.
The PLL input frequency range is limited to 1 to 3.5 MHz, while the VCO oscillation range is
64 to 128 MHz. The CPU clock frequency range when PLL is used is 16 to 64 MHz.
Example 1
1
1
1
1
0
0
0
0
(P0H.7-5)
P0.15-13
1
1
0
0
1
1
0
0
–
–
–
–
–
–
1
0
1
0
1
0
1
0
f
P0(15:13) = ‘110’ (multiplication by 3)
PLL input frequency = 1 MHz
VCO frequency = 48 MHz
PLL output frequency = 12 MHz (VCO frequency divided by 4)
f
XTAL
XTAL
CPU
4 to 8 MHz
5.3 to
10.6 MHz
4 to 8 MHz
6.4 to 12 MHz
1 to 64 MHz
4 to 6.4 MHz
4 to 12 MHz
4 MHz
Internal PLL divider mechanism
frequency
. The slight variation causes a jitter of f
= 12 MHz (no effect of output prescaler)
= 4 MHz
XTAL
XTAL
Section 23.8.9: PLL Jitter
. The relative deviation of TCL is the maximum when it is referred to
AC characteristics
prescaler
f
f
f
f
f
f
XTAL
XTAL
XTAL
XTAL
XTAL
XTAL
Input
-
-
/ 4
/ 4
/ 4
/ 4
/ 2
/ 2
Multiply by
64
48
64
40
40
64
PLL bypassed
for more details.
PLL bypassed
that refer to TCLs therefore must be calculated
PLL
Divide by
CPU
4
4
2
2
2
2
which also effects the duration of
CPU
is constantly adjusted so it is
prescaler
Output
f
Electrical characteristics
PLL
-
-
-
-
-
-
-
/ 2
Table 96
f
CPU frequency
CPU
f
f
f
f
f
f
f
XTAL
XTAL
f
XTAL
XTAL
XTAL
XTAL
XTAL
XTAL
= f
CPU
XTAL
x 10
x 16
x 4
x 3
x 8
x 5
x 1
/ 2
197/231
to
x F