ST10F276-6QR3 STMicroelectronics, ST10F276-6QR3 Datasheet - Page 211

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ST10F276-6QR3

Manufacturer Part Number
ST10F276-6QR3
Description
MCU 16BIT 832K FLASH 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F276-6QR3

Core Processor
ST10
Core Size
16-Bit
Speed
64MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
68K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
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0
ST10F276E
Table 105. Demultiplexed bus (continued)
1. RW-delay and t
2. Read data is latched with the same clock edge that triggers the address change and the rising RD edge.
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
38
39
41
82
83
46
47
48
49
50
51
53
68
55
57
Therefore address changes which occur before the end of RD have no impact on read cycles.
CC
SR
CC
CC
CC
SR
SR
CC
CC
CC
SR
SR
SR
CC
CC
ALE falling edge to Latched
CS
Latched CS low to Valid
Data In
Latched CS hold after RD,
WR
Address setup to RdCS,
WrCS
(with RW-delay)
Address setup to RdCS,
WrCS
(no RW-delay)
RdCS to Valid Data In
(with RW-delay)
RdCS to Valid Data In
(no RW-delay)
RdCS, WrCS low time
(with RW-delay)
RdCS, WrCS low time
(no RW-delay)
Data valid to WrCS
Data hold after RdCS
Data float after RdCS
(with RW-delay)
Data float after RdCS
(no RW-delay)
Address hold after
RdCS, WrCS
Data hold after WrCS
1
Figures
demultiplexed bus.
Partially tested, guaranteed by design characterization.
Parameter
A
refer to the next following bus cycle.
61
to
64
present the different configurations of external memory cycle for a
15.5 + t
- 8.5 + t
14 + 2t
2 + 2t
28 + t
10 + t
- 4 - t
2 + t
2 + t
Min.
0
-
-
-
-
-
f
TCL = 12.5ns
CPU
F
F
A
C
C
A
A
C
F
= 40 MHz
16.5 + t
16.5 + t
16.5 + t
4 + t
4 + t
6 - t
Max.
-
-
-
-
-
-
-
-
-
C
A
C
F
+ 2t
C
F
A
2TCL - 11 + 2t
TCL -10.5 + 2t
2TCL - 9.5 + t
3TCL - 9.5 + t
TCL - 10.5 + t
TCL - 10.5 + t
2TCL - 15 + t
- 8.5 + t
- 4 - t
Min.
1/2 TCL = 1 to 64 MHz
0
-
-
-
-
-
Variable CPU clock
A
F
C
C
C
F
F
A
A
Electrical characteristics
3TCL - 21+ t
2TCL - 8.5 + t
2TCL - 21 + t
3TCL - 21 + t
TCL - 8.5 + t
6 - t
Max.
-
-
-
-
-
-
-
-
-
A
C
+ 2t
F
C
C
F
211/231
A
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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