ST10F276-6QR3 STMicroelectronics, ST10F276-6QR3 Datasheet - Page 52

• Manufacturer Part Number: ST10F276-6QR3
• Description: MCU 16BIT 832K FLASH 144-PQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F276-6QR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 64MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 68K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bootstrap loader
Note:
5.2.6
52/231
Figure 8.
As long as ST10F276E is in BSL, the user’s software should not try to execute code from
the internal IFlash, as the fetches are redirected to the Test-Flash.
Loading the start-up code
After the serial link initialization sequence (see following chapters), the BSL enters a loop to
receive 32 bytes (boot via UART) or 128 bytes (boot via CAN).
These bytes are stored sequentially into ST10F276E Dual-Port RAM from location
00’FA40h.
To execute the loaded code, the BSL then jumps to location 00’FA40h. The bootstrap
sequence running from the Test-Flash is now terminated; however, the microcontroller
remains in BSL mode.
Most probably, the initially loaded routine, being the first level user code, will load additional
code and data. This first level user code may use the pre-initialized interface (UART or CAN)
to receive data and a second level of code, and store it in arbitrary user-defined locations.
This second level of code may be
●
●
●
In all cases, the ST10F276E still runs in BSL mode, that is, with the watchdog timer disabled
and limited access to the internal IFLASH area.
BSL mode active
EA pin
Code fetch from
internal Flash area
Data fetch from
internal Flash area
the final application code
another, more sophisticated, loader routine that adds a transmission protocol to
enhance the integrity of the loaded code or data
a code sequence to change the system configuration and enable the bus interface to
store the received data into external memory
Memory configuration after reset
Yes (P0L.4 = ‘0’)
High
Test-Flash access
User IFLASH access
16 Mbytes
RAM
int.
0
1
access to
int. Flash
enabled
access to
external
bus
disabled
Yes (P0L.4 = ‘0’)
Low
Test-Flash access
User IFLASH access
16 Mbytes
RAM
int.
0
1
access to
int. Flash
enabled
access to
external
bus
enabled
No (P0L.4 = ‘1’)
According to application
User IFLASH access
User IFLASH access
16 Mbytes
RAM
int.
0
1
ST10F276E
Depends on
reset config.
(EA, P0)
Depends on
reset config.