ST10F276-6QR3 STMicroelectronics, ST10F276-6QR3 Datasheet - Page 131

• Manufacturer Part Number: ST10F276-6QR3
• Description: MCU 16BIT 832K FLASH 144-PQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F276-6QR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 64MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 68K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

ST10F276E
20.3.1
In normal running mode (that is when main V
during reset to exercise the EA functionality associated with the same pin: the voltage
supply for the circuitries which are usually biased with V
oscillator used in conjunction with Real-Time Clock module), is granted by the active main
V
It must be noted that Stand-by Mode can generate problems associated with the usage of
different power supplies in CMOS systems; particular attention must be paid when the
ST10F276E I/O lines are interfaced with other external CMOS integrated circuits: if V
ST10F276E becomes (for example in Stand-by Mode) lower than the output level forced by
the I/O lines of these external integrated circuits, the ST10F276E could be directly powered
through the inherent diode existing on ST10F276E output driver circuitry. The same is valid
for ST10F276E interfaced to active/inactive communication buses during Stand-by mode:
current injection can be generated through the inherent diode.
Furthermore, the sequence of turning on/off of the different voltage could be critical for the
system (not only for the ST10F276E device). The device Stand-by mode current (I
vary while V
and V
phenomenon.
Entering stand-by mode
As already said, to enter Stand-by Mode XRAM2EN bit in the XPERCON Register must be
cleared: this allows to freeze immediately the RAM interface, avoiding any data corruption.
As a consequence of a RESET event, the RAM Power Supply is switched to the internal
low-voltage supply V
The RAM interface will remain frozen until the bit XRAM2EN is set again by software
initialization routine (at next exit from main V
Since V
XRAM2EN bit is no longer able to guarantee its content (logic “0”), being the XPERCON
Register powered by internal V
by Mode switching dedicated circuit continues to confirm the RAM interface freezing,
irrespective the XRAM2EN bit content; XRAM2EN bit status is considered again when
internal V
If internal V
with bit XRAM2EN set, the RAM Supply switching circuit is not active: in case of a
temporary drop on internal V
no spurious Stand-by Mode switching can occur (the RAM is not frozen and can still be
accessed).
The ST10F276E Core module, generating the RAM control signals, is powered by internal
V
switched to V
from ST10F276E Core (active low signal) is low enough to be recognized as a logic “0” by
the RAM interface (due to V
address for the RAM and an unwanted data corruption could occur. For this reason, an extra
interface, powered by the switched supply, is used to prevent the RAM from this kind of
potential corruption mechanism.
DD
18
.
supply; during turning off transient these control signals follow the V
STBY
Warning:
18
18
is falling down (as a consequence of V
pins. System noise on both V
18
DD
comes back over internal stand-by reference V
18SB
becomes lower than internal stand-by reference (V
to V
internal reference. It could happen that a high level of RAM write strobe
STBY
During power-off phase, it is important that the external
hardware maintains a stable ground level on RSTIN pin,
18SB
(and vice versa) transition occurs: some current flows between V
(derived from V
18
18
lower than V
18
voltage versus internal V
. This does not generate any problem, because the Stand-
DD
STBY
18SB
and V
DD
DD
through the low-power voltage regulator).
): The bus status could contain a valid
power-on reset sequence).
is on) the V
DD
STBY
turning off), it can happen that the
can contribute to increase this
18SB
STBY
18SB
STBY
during normal code execution,
(see in particular the 32 kHz
.
18SB
pin can be tied to V
Power reduction modes
) of about 0.3 to 0.45V
18
, while RAM is
STBY
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SS
DD
) may
of
DD