S912XEP100J5MAG Freescale Semiconductor, S912XEP100J5MAG Datasheet - Page 110

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S912XEP100J5MAG

Manufacturer Part Number
S912XEP100J5MAG
Description
MCU 64K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S912XEP100J5MAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.2
The following table summarizes the effect of the various configuration bits, i.e. data direction (DDR),
output level (IO), reduced drive (RDR), pull enable (PE), pull select (PS) on the pin function and pull
device activity.
The configuration bit PS is used for two purposes:
110
Reserved
Register
0x037C
0x037D
0x037A
0x037B
0x037E
0x037F
PTFRR
0x0378
0x0379
DDRF
RDRF
Name
PERF
PPSF
PTIF
PTF
1. Configure the sensitive interrupt edge (rising or falling), if interrupt is enabled.
2. Select either a pull-up or pull-down device if PE is active.
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
Register Descriptions
DDRF7
RDRF7
PERF7
PPSF7
PTIF7
PTF7
Bit 7
0
0
= Unimplemented or Reserved
DDRF6
RDRF6
PERF6
PPSF6
PTIF6
PTF6
6
0
0
MC9S12XE-Family Reference Manual , Rev. 1.23
PTFRR5
DDRF5
RDRF5
PERF5
PPSF5
PTIF5
PTF5
5
0
PTFRR4
DDRF4
RDRF4
PERF4
PPSF4
PTIF4
PTF4
4
0
PTFRR3
DDRF3
RDRF3
PERF3
PPSF3
PTIF3
PTF3
3
0
PTFRR2
DDRF2
RDRF2
PERF2
PPSF2
PTIF2
PTF2
2
0
Freescale Semiconductor
PTFRR1
DDRF1
RDRF1
PERF1
PPSF1
PTIF1
PTF1
1
0
PTFRR0
DDRF0
RDRF0
PERF0
PPSF0
PTIF0
PTF0
Bit 0
0

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