S912XEP100J5MAG Freescale Semiconductor, S912XEP100J5MAG Datasheet - Page 804

• Manufacturer Part Number: S912XEP100J5MAG
• Description: MCU 64K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S912XEP100J5MAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 22 Timer Module (TIM16B8CV2) Block Description
22.3.2.11 Timer System Control Register 2 (TSCR2)
Read: Anytime
Write: Anytime.
804
Module Base + 0x000D
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
PR[2:0]
Reset
TCRE
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
TOI
7
3
2
W
R
Timer Overflow Interrupt Enable
0 Interrupt inhibited.
1 Hardware interrupt requested when TOF flag set.
Timer Counter Reset Enable — This bit allows the timer counter to be reset by a successful output compare 7
event. This mode of operation is similar to an up-counting modulus counter.
0 Counter reset inhibited and counter free runs.
1 Counter reset by a successful output compare 7.
Note: If TC7 = 0x0000 and TCRE = 1, TCNT will stay at 0x0000 continuously. If TC7 = 0xFFFF and TCRE = 1,
Note: TCRE=1 and TC7!=0, the TCNT cycle period will be TC7 x "prescaler counter width" + "1 Bus Clock", for
Timer Prescaler Select — These three bits select the frequency of the timer prescaler clock derived from the
Bus Clock as shown in
TOI
0
7
TOF will never be set when TCNT is reset from 0xFFFF to 0x0000.
a more detail explanation please refer to
= Unimplemented or Reserved
Figure 22-19. Timer System Control Register 2 (TSCR2)
0
0
6
PR2
0
0
0
0
1
1
1
1
MC9S12XE-Family Reference Manual Rev. 1.23
Table
Table 22-14. TSCR2 Field Descriptions
Table 22-15. Timer Clock Selection
22-15.
5
0
0
PR1
0
0
1
1
0
0
1
1
0
0
4
Section 22.4.3, “Output Compare
PR0
Description
0
1
0
1
0
1
0
1
TCRE
0
3
Bus Clock / 128
Bus Clock / 16
Bus Clock / 32
Bus Clock / 64
Bus Clock / 1
Bus Clock / 2
Bus Clock / 4
Bus Clock / 8
Timer Clock
PR2
2
0
Freescale Semiconductor
PR1
0
1
PR0
0
0