MCIMX355AJQ5C Freescale Semiconductor, MCIMX355AJQ5C Datasheet - Page 74

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MCIMX355AJQ5C

Manufacturer Part Number
MCIMX355AJQ5C
Description
MULTIMEDIA PROCESSOR 400-MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX35r
Datasheet

Specifications of MCIMX355AJQ5C

Core Processor
ARM11
Core Size
32-Bit
Speed
532MHz
Connectivity
1-Wire, CAN, EBI/EMI, Ethernet, I²C, MMC, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
400-MAPBGA
Processor Series
i.MX355
Core
ARM1136JF-S
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
I2C, I2S, SPI, SSI, UART
Maximum Clock Frequency
133 MHz
Number Of Timers
3
Operating Supply Voltage
1.22 V to 1.47 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
IMX35PDK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
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Section 4.9.13.1.5, “Interface to Active Matrix TFT LCD Panels, Electrical Characteristics.”
images correspond to straight polarity of the Sharp signals.
74
IP21
IP22
IP23
IP24
IP25
IP26
ID
DISPB_D3_DATA
DISPB_D3_SPL
DISPB_D3_CLS
DISPB_D3_REV
DISPB_D3_PS
DISPB_D3_CLK
DISPB_D3_HSYNC
SPL rise time
CLS rise time
CLS fall time
CLS rise and PS fall time
PS rise time
REV toggle time
Table 54. Sharp Synchronous Display Interface Timing Parameters—Pixel Level
Figure 52. Sharp HR-TFT Panel Interface Timing Diagram—Pixel Level
Parameter
i.MX35 Applications Processors for Automotive Products, Rev. 9
SPL pulse width is fixed and aligned to the first data of the line.
Example is drawn with FW + 1 = 320 pixel/line, FH + 1 = 240 lines.
REV toggles every HSYNC period.
IP24
IP22
Horizontal timing
IP21
IP23
Symbol
Tsplr
Tclsr
Tclsf
Tpsr
Tpsf
Trev
IP25
D1 D2
IP26
1 DISPB_D3_CLK period
(BGXP – 1) × Tdpcp
CLS_RISE_DELAY × Tdpcp
CLS_FALL_DELAY × Tdpcp
PS_FALL_DELAY × Tdpcp
PS_RISE_DELAY × Tdpcp
REV_TOGGLE_DELAY × Tdpcp
D320
Value
Freescale Semiconductor
The timing
Units
ns
ns
ns
ns
ns
ns

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