PIC17C756-33/L Microchip Technology, PIC17C756-33/L Datasheet - Page 91

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PIC17C756-33/L

Manufacturer Part Number
PIC17C756-33/L
Description
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr

Specifications of PIC17C756-33/L

Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
13.0
The PIC17C75X has a wealth of timers and time-based
functions to ease the implementation of control applica-
tions. These time-base functions include three PWM
outputs and four Capture inputs.
Timer1 and Timer2 are two 8-bit incrementing timers,
each with an 8-bit period register (PR1 and PR2
respectively) and separate overflow interrupt flags.
Timer1 and Timer2 can operate either as timers (incre-
ment on internal Fosc/4 clock) or as counters (incre-
ment on falling edge of external clock on pin
RB4/TCLK12). They are also software configurable to
operate as a single 16-bit timer/counter. These timers
are also used as the time-base for the PWM (Pulse
Width Modulation) modules.
Timer3 is a 16-bit timer/counter which uses the TMR3H
and TMR3L registers. Timer3 also has two additional
registers (PR3H/CA1H: PR3L/CA1L) that are config-
urable as a 16-bit period register or a 16-bit capture
register. TMR3 can be software configured to incre-
ment from the internal system clock (F
an external signal on the RB5/TCLK3 pin. Timer3 is the
time-base for all of the 16-bit captures.
FIGURE 13-1: TCON1 REGISTER (ADDRESS: 16h, BANK 3)
1997 Microchip Technology Inc.
CA2ED1 CA2ED0 CA1ED1 CA1ED0
bit7
bit 7-6: CA2ED1:CA2ED0: Capture2 Mode Select bits
bit 5-4: CA1ED1:CA1ED0: Capture1 Mode Select bits
bit 3:
bit 2:
bit 1:
bit 0:
R/W - 0 R/W - 0 R/W - 0 R/W - 0 R/W - 0
TIMER1, TIMER2, TIMER3,
PWMS AND CAPTURES
00 = Capture on every falling edge
01 = Capture on every rising edge
10 = Capture on every 4th rising edge
11 = Capture on every 16th rising edge
00 = Capture on every falling edge
01 = Capture on every rising edge
10 = Capture on every 4th rising edge
11 = Capture on every 16th rising edge
T16: Timer2:Timer1 Mode Select bit
1 = Timer2 and Timer1 form a 16-bit timer
0 = Timer2 and Timer1 are two 8-bit timers
TMR3CS: Timer3 Clock Source Select bit
1 = TMR3 increments off the falling edge of the RB5/TCLK3 pin
0 = TMR3 increments off the internal clock
TMR2CS: Timer2 Clock Source Select bit
1 = TMR2 increments off the falling edge of the RB4/TCLK12 pin
0 = TMR2 increments off the internal clock
TMR1CS: Timer1 Clock Source Select bit
1 = TMR1 increments off the falling edge of the RB4/TCLK12 pin
0 = TMR1 increments off the internal clock
OSC
/4) or from
T16
Preliminary
TMR3CS TMR2CS TMR1CS
R/W - 0
Six other registers comprise the Capture2, Capture3,
and Capture4 registers (CA2H:CA2L, CA3H:CA3L,
and CA4H:CA4L).
Figure 13-1, Figure 13-2, and Figure 13-3 are the con-
trol registers for the operation of Timer1, Timer2, and
Timer3, as well as PWM1, PWM2, PWM3, Capture1,
Capture2, Capture3, and Capture4.
Table 13-1 shows the Timer resource requirements for
these time-base functions. Each timer is an open
resource so that multiple functions may operate with it.
TABLE 13-1:
R/W - 0
Time-base Function
PWM1
PWM2
PWM3
Capture1
Capture2
Capture3
Capture4
R/W - 0
bit0
TIME-BASE FUNCTION /
RESOURCE
REQUIREMENTS
R = Readable bit
W = Writable bit
-n = Value at POR reset
Timer Resource
Timer1
Timer1 or Timer2
Timer1 or Timer2
Timer3
Timer3
Timer3
Timer3
DS30264A-page 91

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