PIC16F690-E/ML Microchip Technology, PIC16F690-E/ML Datasheet - Page 153

• Manufacturer Part Number: PIC16F690-E/ML
• Description: IC, 8BIT MCU, PIC16F, 20MHZ, QFN-20
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F690-E/ML

• Controller Family/series: PIC16F
• No. Of I/o's: 18
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Core Size: 8 Bit
• Program Memory Size: 4096 Words
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20QFN-1 - SOCKET TRANSITION 20DIP-20QFNAC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNPIC16F690DM-PCTLHS - BOARD DEMO PICTAIL HUMIDITY SNSRAC162061 - HEADER INTRFC MPLAB ICD2 20PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

12.0
The Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART) module is a serial I/O
communications peripheral. It contains all the clock
generators, shift registers and data buffers necessary
to perform an input or output serial data transfer
independent of device program execution. The
EUSART, also known as a Serial Communications
Interface (SCI), can be configured as a full-duplex
asynchronous system or half-duplex synchronous
system.
communications with peripheral systems, such as CRT
terminals
Synchronous mode is intended for communications
with peripheral devices, such as A/D or D/A integrated
circuits, serial EEPROMs or other microcontrollers.
These devices typically do not have internal clocks for
baud rate generation and require the external clock
signal provided by a master synchronous device.
FIGURE 12-1:
© 2008 Microchip Technology Inc.
BRG16
Baud Rate Generator
SPBRGH
ENHANCED UNIVERSAL
SYNCHRONOUS
ASYNCHRONOUS RECEIVER
TRANSMITTER (EUSART)
and
Full-Duplex
SPBRG
personal
+ 1
EUSART TRANSMIT BLOCK DIAGRAM
F
Multiplier
OSC
BRG16
mode
SYNC
BRGH
computers.
TXEN
1 X 0 0
X 1 1 0
X 1 0 1
÷ n
PIC16F631/677/685/687/689/690
x4
is
n
x16 x64
useful
Half-Duplex
0
0
0
MSb
(8)
for
Transmit Shift Register (TSR)
TX9D
TXREG Register
• • •
TX9
The EUSART module includes the following capabilities:
• Full-duplex asynchronous transmit and receive
• Two-character input buffer
• One-character output buffer
• Programmable 8-bit or 9-bit character length
• Address detection in 9-bit mode
• Input buffer overrun error detection
• Received character framing error detection
• Half-duplex synchronous master
• Half-duplex synchronous slave
• Programmable clock polarity in synchronous
• Sleep operation
The EUSART module implements the following
additional features, making it ideally suited for use in
Local Interconnect Network (LIN) bus systems:
• Automatic detection and calibration of the baud rate
• Wake-up on Break reception
• 13-bit Break character transmit
Block diagrams of the EUSART transmitter and
receiver are shown in Figure 12-1 and Figure 12-2.
modes
8
Data Bus
TRMT
LSb
0
TXIF
TXIE
Pin Buffer
and Control
SPEN
DS41262E-page 151
Interrupt
TX/CK pin