PIC16F690-E/ML Microchip Technology, PIC16F690-E/ML Datasheet - Page 204

IC, 8BIT MCU, PIC16F, 20MHZ, QFN-20

PIC16F690-E/ML

Manufacturer Part Number
PIC16F690-E/ML
Description
IC, 8BIT MCU, PIC16F, 20MHZ, QFN-20
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F690-E/ML

Controller Family/series
PIC16F
No. Of I/o's
18
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
Core Size
8 Bit
Program Memory Size
4096 Words
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20QFN-1 - SOCKET TRANSITION 20DIP-20QFNAC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNPIC16F690DM-PCTLHS - BOARD DEMO PICTAIL HUMIDITY SNSRAC162061 - HEADER INTRFC MPLAB ICD2 20PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC16F631/677/685/687/689/690
14.2.4
The BOREN0 and BOREN1 bits in the Configuration
Word register select one of four BOR modes. Two
modes have been added to allow software or hardware
control of the BOR enable. When BOREN<1:0> = 01,
the SBOREN bit (PCON<4>) enables/disables the
BOR allowing it to be controlled in software. By
selecting BOREN<1:0>, the BOR is automatically
disabled in Sleep to conserve power and enabled on
wake-up. In this mode, the SBOREN bit is disabled.
See
definition.
If V
(T
the Brown-out situation will reset the device. This will
occur regardless of V
to occur if V
(T
FIGURE 14-3:
DS41262E-page 202
BOR
BOR
DD
) (see Section 17.0 “Electrical Specifications”),
).
Register 14-2
Note 1: 64 ms delay only if PWRTE bit is programmed to ‘0’.
falls below V
DD
BROWN-OUT RESET (BOR)
falls below V
Internal
Internal
Internal
Reset
Reset
Reset
V
V
V
DD
DD
DD
DD
BOR
for
BROWN-OUT SITUATIONS
slew rate. A Reset is not insured
for greater than parameter
BOR
the
for less than parameter
Configuration
Word
< 64 ms
64 ms
On any Reset (Power-on, Brown-out Reset, Watchdog
Timer, etc.), the chip will remain in Reset until V
above V
will now be invoked, if enabled and will keep the chip in
Reset an additional 64 ms.
If V
running, the chip will go back into a Brown-out Reset
and the Power-up Timer will be re-initialized. Once V
rises above V
64 ms Reset.
(1)
Note:
64 ms
64 ms
DD
drops below V
(1)
BOR
(1)
The Power-up Timer is enabled by the
PWRTE bit in the Configuration Word
register.
(see Figure 14-3). The Power-up Timer
BOR
, the Power-up Timer will execute a
BOR
© 2008 Microchip Technology Inc.
while the Power-up Timer is
V
V
V
BOR
BOR
BOR
DD
rises
DD

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