PIC16F690-E/ML Microchip Technology, PIC16F690-E/ML Datasheet - Page 202

IC, 8BIT MCU, PIC16F, 20MHZ, QFN-20

PIC16F690-E/ML

Manufacturer Part Number
PIC16F690-E/ML
Description
IC, 8BIT MCU, PIC16F, 20MHZ, QFN-20
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F690-E/ML

Controller Family/series
PIC16F
No. Of I/o's
18
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
Core Size
8 Bit
Program Memory Size
4096 Words
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20QFN-1 - SOCKET TRANSITION 20DIP-20QFNAC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNPIC16F690DM-PCTLHS - BOARD DEMO PICTAIL HUMIDITY SNSRAC162061 - HEADER INTRFC MPLAB ICD2 20PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC16F631/677/685/687/689/690
14.2
The PIC16F631/677/685/687/689/690 differentiates
between various kinds of Reset:
a)
b)
c)
d)
e)
f)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset (BOR)
FIGURE 14-1:
DS41262E-page 200
MCLR/V
Power-on Reset (POR)
WDT Reset during normal operation
WDT Reset during Sleep
MCLR Reset during normal operation
MCLR Reset during Sleep
Brown-out Reset (BOR)
CLKI pin
OSC1/
V
Note 1:
DD
Reset
PP
pin
LFINTOSC
OST/PWRT
Refer to the Configuration Word register (Register 14-1).
Brown-out
V
Module
Detect
DD
WDT
Reset
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
Rise
OST
PWRT
(1)
10-bit Ripple Counter
WDT
Time-out
Reset
11-bit Ripple Counter
SBOREN
BOREN
Power-on Reset
External
Reset
Sleep
They are not affected by a WDT Wake-up since this is
viewed as the resumption of normal operation. TO and
PD bits are set or cleared differently in different Reset
situations, as indicated in Table 14-2. These bits are
used in software to determine the nature of the Reset.
See Table 14-4 for a full description of Reset states of
all registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 14-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 17.0 “Electrical
Specifications” for pulse-width specifications.
Enable PWRT
Enable OST
© 2008 Microchip Technology Inc.
S
R
Q
Chip_Reset

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