PIC16F690-E/ML Microchip Technology, PIC16F690-E/ML Datasheet - Page 87

IC, 8BIT MCU, PIC16F, 20MHZ, QFN-20

PIC16F690-E/ML

Manufacturer Part Number
PIC16F690-E/ML
Description
IC, 8BIT MCU, PIC16F, 20MHZ, QFN-20
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F690-E/ML

Controller Family/series
PIC16F
No. Of I/o's
18
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
Core Size
8 Bit
Program Memory Size
4096 Words
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20QFN-1 - SOCKET TRANSITION 20DIP-20QFNAC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNPIC16F690DM-PCTLHS - BOARD DEMO PICTAIL HUMIDITY SNSRAC162061 - HEADER INTRFC MPLAB ICD2 20PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
6.2.1
When the internal clock source is selected the
TMR1H:TMR1L register pair will increment on multiples
of F
6.2.2
When the external clock source is selected, the Timer1
module may work as a timer or a counter.
When counting, Timer1 is incremented on the rising
edge of the external clock input T1CKI. In addition, the
Counter mode clock can be synchronized to the
microcontroller system clock or run asynchronously.
If an external clock oscillator is needed (and the
microcontroller is using the INTOSC without CLKOUT),
Timer1 can use the LP oscillator as a clock source.
6.3
Timer1 has four prescaler options allowing 1, 2, 4 or 8
divisions of the clock input. The T1CKPS bits of the
T1CON register control the prescale counter. The
prescale counter is not directly readable or writable;
however, the prescaler counter is cleared upon a write to
TMR1H or TMR1L.
6.4
A low-power 32.768 kHz crystal oscillator is built-in
between pins OSC1 (input) and OSC2 (amplifier
output). The oscillator is enabled by setting the
T1OSCEN control bit of the T1CON register. The
oscillator will continue to run during Sleep.
The Timer1 oscillator is shared with the system LP
oscillator. Thus, Timer1 can use this mode only when
the primary system clock is derived from the internal
oscillator or when the oscillator is in the LP mode. The
user must provide a software time delay to ensure
proper oscillator start-up.
© 2008 Microchip Technology Inc.
Note:
Note:
OSC
as determined by the Timer1 prescaler.
Timer1 Prescaler
Timer1 Oscillator
• Timer1 enabled after POR reset
• Write to TMR1H or TMR1L
• Timer1 is disabled
• Timer1 is disabled (TMR1ON 0) when
INTERNAL CLOCK SOURCE
EXTERNAL CLOCK SOURCE
In Counter mode, a falling edge must be
registered by the counter prior to the first
incrementing rising edge after any one or
more of the following conditions:
See Figure 6-2
T1CKI is high then Timer1 is enabled
(TMR1ON=1) when T1CKI is low.
PIC16F631/677/685/687/689/690
TRISA5 and TRISA4 bits are set when the Timer1
oscillator is enabled. RA5 and RA4 bits read as ‘0’ and
TRISA5 and TRISA4 bits read as ‘1’.
6.5
If control bit T1SYNC of the T1CON register is set, the
external clock input is not synchronized. The timer
increments asynchronously to the internal phase
clocks. If external clock source is selected then the
timer will continue to run during Sleep and can
generate an interrupt on overflow, which will wake-up
the processor. However, special precautions in
software are needed to read/write the timer (see
Section 6.5.1 “Reading and Writing Timer1 in
Asynchronous Counter Mode”).
6.5.1
Reading TMR1H or TMR1L while the timer is running
from an external asynchronous clock will ensure a valid
read (taken care of in hardware). However, the user
should keep in mind that reading the 16-bit timer in two
8-bit values itself, poses certain problems, since the
timer may overflow between the reads.
For writes, it is recommended that the user simply stop
the timer and write the desired values. A write
contention may occur by writing to the timer registers,
while the register is incrementing. This may produce an
unpredictable value in the TMR1H:TMR1L register pair.
6.6
The Timer1 gate (when enabled) allows Timer1 to count
when Timer1 gate is active. Timer1 gate source is
software configurable to be the T1G pin or the output of
Comparator C2. This allows the device to directly time
external events using T1G or analog events using
Comparator
(Register 8-3) for selecting the Timer1 gate source. This
feature can simplify the software for a Delta-Sigma A/D
converter and many other applications.
Note:
Note:
Timer1 Operation in
Asynchronous Counter Mode
Timer1 Gate
The oscillator requires a start-up and
stabilization time before use. Thus,
T1OSCEN should be set and a suitable
delay observed prior to enabling Timer1.
When switching from synchronous to
asynchronous operation, it is possible to
skip an increment. When switching from
asynchronous to synchronous operation,
it is possible to produce an additional
increment.
READING AND WRITING TIMER1 IN
ASYNCHRONOUS COUNTER
MODE
C2.
See
the
CM2CON1
DS41262E-page 85
register

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