CP3BT10G38 National Semiconductor, CP3BT10G38 Datasheet - Page 184

• Manufacturer Part Number: CP3BT10G38
• Description: IC CPU RISC W/LLC&USB 100-LQFP
• Manufacturer: National Semiconductor

Specifications of CP3BT10G38

• Applications: Connectivity Processor
• Core Processor: CR16C
• Program Memory Type: FLASH (256 kB)
• Controller Series: CP3000
• Ram Size: 10K x 8
• Interface: Bluetooth, ACCESS.bus, Audio, UART, USB, Microwire/SPI
• Number Of I /o: 37
• Voltage - Supply: 2.25 V ~ 2.75 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *CP3BT10G38

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27.4
t
t
t
t
t
t
t
t
t
t
Symbol
START
TRAN
PROG
PERASE
MERASE
END
MEND
RCV
HV
HV
a. Program/erase to NVSTR Setup Time is determined by the following equation:
b. NVSTR to Program Setup Time is determined by the following equation:
c. Programming Pulse Width is determined by the following equation:
d. Page Erase Pulse Width is determined by the following equation:
e. Module Erase Pulse Width is determined by the following equation:
f. NVSTR Hold Time is determined by the following equation:
g. NVSTR Hold Time (Module Erase) is determined by the following equation:
h. Recovery Time is determined by the following equation:
i. Cumulative program high voltage period for each row after erase t
t
the FMPSR or FSMPSR register, and FTSTART is the contents of the FMSTART or FSMSTART register
t
the FMPSR or FSMPSR register, and FTTRAN is the contents of the FMTRAN or FSMTRAN register
t
tents of the FMPSR or FSMPSR register, and FTPROG is the contents of the FMPROG or FSMPROG regis-
ter
t
contents of the FMPSR or FSMPSR register, and FTPER is the contents of the FMPERASE or FSMPER-
ASE register
t
contents of the FMPSR or FSMPSR register, and FTMER is the contents of the FMMERASE0 or
FSMMERASE0 register
t
FMPSR or FSMPSR register, and FTEND is the contents of the FMEND or FSMEND register
t
tents of the FMPSR or FSMPSR register, and FTMEND is the contents of the FMMEND or FSMMEND regis-
ter
t
FMPSR or FSMPSR register, and FTRCV is the contents of the FMRCV or FSMRCV register
is exposed to the programming voltage after the last erase cycle.
START
TRAN
PROG
PERASE
MERASE
END
MEND
RCV
FLASH MEMORY ON-CHIP PROGRAMMING
Program/Erase to NVSTR Setup Time
(NVSTR = Non-Volatile Storage
NVSTR to Program Setup Time
Programming Pulse Width
Page Erase Pulse Width
Module Erase Pulse Width
NVSTR Hold Time
NVSTR Hold Time (Module Erase)
Recovery Time
Cumulative Program High Voltage Period For
Each Row After Erase
Write/Erase Endurance
Data Retention
= T
= T
= T
= T
= T
= T
clk
clk
= T
= T
clk
clk
clk
clk
× (FTDIV + 1) × (FTEND + 1), where T
× (FTDIV + 1) × (FTRCV + 1), where T
clk
clk
× (FTDIV + 1) × (FTTRAN + 1), where T
× (FTDIV + 1) × (FTSTART + 1), where T
× (FTDIV + 1) × 8 × (FTPROG + 1), where T
× (FTDIV + 1) × 8 × (FTMEND + 1), where T
× (FTDIV + 1) × 4096 × (FTPER + 1), where T
× (FTDIV + 1) × 4096 × (FTMER + 1), where T
h
Parameter
f
i
d
c
e
b
g
a
clk
clk
184
is the System Clock period, FTDIV is the contents of the
is the System Clock period, FTDIV is the contents of the
clk
128K program blocks
8K data block
25°C
clk
is the System Clock period, FTDIV is the contents of
is the System Clock period, FTDIV is the contents of
clk
clk
is the System Clock period, FTDIV is the con-
Conditions
is the System Clock period, FTDIV is the con-
clk
clk
is the System Clock period, FTDIV is the
is the System Clock period, FTDIV is the
HV
is the accumulated duration a flash cell
20,000
200
100
100
Min
10
20
20
5
5
1
-
-
Max
40
8
4
-
-
-
-
-
-
-
-
-
µs
µs
µs
ms
ms
µs
µs
µs
ms
ms
cycles
years
Units