DJLXT360LE.A2 S E001 Intel, DJLXT360LE.A2 S E001 Datasheet - Page 26

• Manufacturer Part Number: DJLXT360LE.A2 S E001
• Manufacturer: Intel

Specifications of DJLXT360LE.A2 S E001

• Number Of Transceivers: 1
• Operating Supply Voltage (typ): 5V
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

LXT360 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications
2.7.3
2.7.3.1
2.7.3.2
2.7.3.3
2.7.3.4
26
With this mode is active, logic errors and bipolar violations can be inserted into the transmit data
stream. Inserting a logic error requires a Low-to-High transition of the INSLER pin. If no logic or
bit errors are to be inserted, INSLER must remain Low. A Low-to-High transition on the INSBPV
pin will insert a bipolar violation, regardless of whether the device is in the Unipolar or Bipolar
mode of operation.
Error Insertion and Detection
Bipolar Violation Insertion (INSBPV)
The INSBPV function is available in Unipolar mode. Sampling occurs on the falling edge of
TCLK. A Low-to-High transition on the INSBPV pin inserts a BPV on the next available mark,
except in the four following situations:
Note that when the LXT360 is configured to transmit internally generated data patterns (QRSS or
NLOOP), a BPV can be inserted on the transmit pattern regardless of whether the device is in the
Unipolar or Bipolar mode of operation.
Logic Error Insertion (INSLER)
When transmission of QRSS or NLOOP Up/Down codes are active, a logic error is inserted into
the transmit data pattern when a Low-to-High transition occurs on the INSLER pin. Note that in
QRSS mode, logic error insertion is inhibited on a jammed bit (i.e. a bit forced to one to suppress
transmission of more than 14 consecutive zeros).
The transceiver treats data patterns the same way it treats data applied to TPOS/TNEG. Therefore,
the inserted logic error will follow the data flow path as defined by the active loopback mode
Logic Error Detection (QPD)
After pattern synchronization is detected in QRSS mode, subsequent logic errors are reported on
the QPD pin. If a logic error occurs, the QPD pin goes High for half an RCLK cycle. Note that in
Host mode, the precise relationship between QPD and RCLK depends on the value of the CLKE
pin. When CLKE is Low, QPD goes High while RCLK is High; when CLKE is High, QPD goes
High while RCLK is Low. To tally logic errors, connect an error counter to QPD. A continuous
High on this pin indicates loss of either the QRSS pattern lock or a LOS condition.
Signal Source (QRSS)” on page 24
Bipolar Violation Detection (BPV)
When the internal encoders/decoders are disabled or when configured in Unipolar mode, bipolar
violations are reported at the BPV pin. BPV goes High for a full clock cycle to indicate receipt of a
BPV. When the encoders/decoders are enabled, the LXT360 does not report bipolar violations due
to the line coding scheme.
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When zero suppression (B8ZS) is not violated
When LLOOP and TAOS are both active. In this case, the BPV is looped back to the BPV pin
and the line driver transmits all ones with no violation.
When RLOOP is active
When NLOOP is active
provides additional details on QRSS pattern lock criteria.
“Quasi-Random
Datasheet