DJLXT360LE.A2 S E001 Intel, DJLXT360LE.A2 S E001 Datasheet - Page 30

• Manufacturer Part Number: DJLXT360LE.A2 S E001
• Manufacturer: Intel

Specifications of DJLXT360LE.A2 S E001

• Number Of Transceivers: 1
• Operating Supply Voltage (typ): 5V
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

LXT360 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications
3.0
30
Interrupt Clear
1. In writable registers, bits labeled reserved should be set to 0 (except as in note 2 below) for normal operation and ignored in
2. Write a 1 to this bit for normal operation.
Performance
Control #1
Control #2
Control #3
Control #4
Transition
Equalizer
read only registers.
Table 7.
Table 8.
Status
Status
Status
Name
Register
Register Definitions
The LXT360 contains five read/write and three read-only registers that are accessible in Host mode
via the serial I/O port.
address byte are valid (the address decoder ignores bits A7 and A0) while A0 functions as the read/
write (R/W) bit.
the function of the bits in each register.
Note: upon power-up or reset, all registers are cleared to 0.
Register Addresses
Register and Bit Summary
CR1
CR2
CR3
TSR
PSR
ESR
CR4
ICR
1. x = don’t care.
2. Address A0 is the read/write (R/W) bit.
Type
Performance Status
R/W
R/W
R/W
R/W
R/W
Transition Status
R
R
R
Equalizer Status
Interrupt Clear
Control #1
Control #2
Control #3
Control #4
Name
reserved
reserved
JASEL1
ESUNF
RESET
JA6HZ
LATN7
CESU
7
Table 8
Register
1
1
Table 7
reserved
reserved
JASEL0
ESOVR
EPAT1
LATN6
identifies the name of each register bit.
CESO
BIST
6
lists the LXT360 register addresses. Only bits A6 through A1 of the
1
1
Abbr
CR1
CR2
CR3
TSR
PSR
ESR
CR4
reserved
ICR
ENCENB
CDFMO
TDFMO
EPAT0
LATN5
SBIST
DFMO
5
1
Address
EQZMON
reserved
reserved
reserved
reserved
UNIENB
ETAOS
LATN4
x010000
x010001
x010010
x010011
x010100
x010101
x010110
x010111
A7 - A1
4
2
1
1
1
1, 2
Bit
COL32CM
reserved
reserved
ENLOOP
CQRSS
TQRSS
QRSS
EC4
3
Table 9
1
1
reserved
LOS2048
EALOOP
ES64
CAIS
TAIS
EC3
AIS
2
through
1
CNLOOP
reserved
TNLOOP
ELLOOP
NLOOP
ESCEN
ZEROV
Table 17
EC2
1
1
Datasheet
reserved
ERLOOP
describe
CODEV
ESJAM
CLOS
TLOS
EC1
LOS
0
1