MT46H16M32LFCM-6:B Micron Technology Inc, MT46H16M32LFCM-6:B Datasheet - Page 8

MT46H16M32LFCM-6:B

Manufacturer Part Number
MT46H16M32LFCM-6:B
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet

Specifications of MT46H16M32LFCM-6:B

Organization
16Mx32
Density
512Mb
Address Bus
15b
Access Time (max)
6.5/5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
115mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT46H16M32LFCM-6:B
Manufacturer:
MICRON
Quantity:
4 000
Company:
Part Number:
MT46H16M32LFCM-6:B
Quantity:
132
Part Number:
MT46H16M32LFCM-6:B TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
General Description
PDF: 09005aef82d5d305
512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN
The 512Mb Mobile DDR SDRAM is a high-speed CMOS, dynamic random-access mem-
ory containing 536,870,912 bits. It is internally configured as a quad-bank DRAM. Each
of the x16’s 134,217,728-bit banks is organized as 8,192 rows by 1,024 columns by 16
bits. Each of the x32’s 134,217,728-bit banks is organized as 8,192 rows by 512 columns
by 32 bits. In the reduced page-size (LG) option, each of the x32’s 134,217,728-bit banks
are organized as 16,384 rows by 256 columns by 32 bits.
Note:
1. Throughout this data sheet, various figures and text refer to DQs as “DQ.” DQ should
be interpreted as any and all DQ collectively, unless specifically stated otherwise. Addi-
tionally, the x16 is divided into 2 bytes: the lower byte and the upper byte. For the lower
byte (DQ[7:0]), DM refers to LDM and DQS refers to LDQS. For the upper byte
(DQ[15:8]), DM refers to UDM and DQS refers to UDQS. The x32 is divided into 4 bytes.
For DQ[7:0], DM refers to DM0 and DQS refers to DQS0. For DQ[15:8], DM refers to
DM1 and DQS refers to DQS1. For DQ[23:16], DM refers to DM2 and DQS refers to
DQS2. For DQ[31:24], DM refers to DM3 and DQS refers to DQS3.
2. Complete functionality is described throughout the document; any page or diagram
may have been simplified to convey a topic and may not be inclusive of all requirements.
3. Any specific requirement takes precedence over a general statement.
8
512Mb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
General Description
© 2004 Micron Technology, Inc. All rights reserved.

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