MAX1358BETL+ Maxim Integrated Products, MAX1358BETL+ Datasheet - Page 40

• Manufacturer Part Number: MAX1358BETL+
• Description: IC DAS 16BIT 40-TQFN
• Manufacturer: Maxim Integrated Products
• Type: Data Acquisition System (DAS)r

Specifications of MAX1358BETL+

• Resolution (bits): 16 b
• Sampling Rate (per Second): 21.84k
• Data Interface: Serial
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Number Of Converters: 2
• Resolution: 16 bit
• Interface Type: Serial (4-Wire, SPI, QSPI, Microwire)
• Voltage Reference: 1.25 V
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.8 V
• Maximum Power Dissipation: 2051.3 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Input Voltage: 1.8 V to 3.6 V
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16-Bit, Data-Acquisition System with ADC, DACs,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
unsigned binary with 23 bits to the right of the decimal
point and scales the ADC output before being written to
the DATA register. The gain calibration allows full-scale
errors between -V
unipolar mode and full-scale errors between (+50% x
V
The MAX1358B can perform system gain calibration or
self-gain calibration. Self-calibration performs a calibra-
DATA Register (Power-On State: 0000 0000 0000 0000)
ADC<15:0> Analog-to-digital conversion data bits.
These 16 bits are the results from the most recently
completed conversion. The data format is unsigned,
OFFSET CAL Register (Power-On State: 0000 0000 0000 0000 0000 0000)
is two’s complement and is subtracted from the ADC
output before being written to the DATA register. The
offset calibration allows input offset errors between
V
The MAX1358B can perform system offset calibration
or self-offset calibration. Self-calibration performs a cal-
GAIN CAL Register (Power-On State: 1000 0000 0000 0000 0000 0000)
GAIN<23:0>: Gain-calibration bits. The data format is
40
OFFSET<23:0>: Offset-calibration bits. The data format
REF
REF
OFFSET23
OFFSET15
OFFSET7
GAIN23
GAIN15
ADC15
GAIN7
______________________________________________________________________________________
ADC7
) and (+200% x V
MSB
MSB
MSB
±50% to be corrected in unipolar or bipolar mode.
OFFSET22
OFFSET14
OFFSET6
REF
GAIN22
GAIN14
ADC14
GAIN6
ADC6
/2 and +V
REF
) in unipolar or bipolar mode.
REF
OFFSET21
OFFSET13
OFFSET5
GAIN21
GAIN13
ADC13
GAIN5
ADC5
/2 to be corrected in
OFFSET20
OFFSET12
OFFSET4
GAIN20
GAIN12
ADC12
GAIN4
ADC4
binary for unipolar mode, and two’s complement for
bipolar mode.
tion for offsets in the ADC, and system calibration per-
forms a calibration for the entire signal path. See the
ADC Calibration section for more details.
The ADC input voltage range specifications must always
be obeyed, and the GAIN CAL register effectively scales
the ADC digital output to a full-scale value determined
by the calibration. The usable gain-calibration range is
limited to less than the full GAIN CAL register digital-
scaling range by the internal noise of the ADC.
ibration for the entire signal path. See the ADC
Calibration section for more details.
The ADC input voltage range specifications must
always be obeyed, and the OFFSET CAL register effec-
tively offsets the ADC digital scale to a “zero” value
determined by the calibration.
OFFSET19
OFFSET11
OFFSET3
GAIN19
GAIN11
ADC11
GAIN3
ADC3
OFFSET18
OFFSET10
OFFSET2
GAIN18
GAIN10
ADC10
GAIN2
ADC2
OFFSET17
OFFSET9
OFFSET1
GAIN17
GAIN9
GAIN1
ADC9
ADC1
OFFSET16
OFFSET8
OFFSET0
GAIN16
GAIN8
GAIN0
ADC8
ADC0
LSB
LSB
LSB