PSD835G2V-12U STMicroelectronics, PSD835G2V-12U Datasheet - Page 110

• Manufacturer Part Number: PSD835G2V-12U
• Manufacturer: STMicroelectronics

Specifications of PSD835G2V-12U

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: TQFP
• Mounting: Surface Mount
• Pin Count: 80
• Lead Free Status / Rohs Status: Compliant

DC and AC parameters
Table 42.
1. Any input used to select an internal PSD function.
2. WR has the same timing as E and DS signals.
3. t
4. t
5. Assuming WRITE is active before data becomes valid.
6. In multiplexed mode, latched address generated from ADIO delay to address output on any port.
7. Assuming data is stable before active WRITE signal.
110/120
t
t
t
t
t
t
t
t
t
t
t
t
t
t
LVLX
AVLX
LXAX
AVWL
SLWL
DVWH
WHDX
WLWH
WHAX1
WHAX2
WHPV
DVMV
AVPV
WLMV
Symbol
WHDX
WHAX2
is 6ns when writing to Output macrocell registers AB and BC.
is the address hold time for DPLD inputs that are used to generate Sector Select signals for internal PSD memory.
ALE or AS pulse width
Address setup time
Address hold time
Address valid to leading
edge of WR
CS valid to leading edge of WR
WR data setup time
WR data hold time
WR pulse width
Trailing edge of WR to address invalid
Trailing edge of WR to DPLD address
invalid
Trailing edge of WR to port output
valid using I/O port data register
Data valid to port output valid
using macrocell register
Preset/Clear
Address input valid to address
output delay
WR valid to port output valid using
macrocell register Preset/Clear
WRITE timing
Parameter
Doc ID 10585 Rev 3
Conditions
(1)(2)
(2)(3)
(2)(4)
(2)(5)
(2)(7)
(1)
(1)
(2)
(2)
(2)
(2)
(2)
(6)
Min
22
15
15
40
40
7
8
5
8
0
-
-
-
-
-90
Max
33
65
65
30
-
-
-
-
-
-
-
-
-
-
Min
24
10
18
18
45
45
10
9
8
0
-
-
-
-
-12
PSD835G2V
Max
33
70
68
35
-
-
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns