PSD835G2V-12U STMicroelectronics, PSD835G2V-12U Datasheet - Page 78

• Manufacturer Part Number: PSD835G2V-12U
• Manufacturer: STMicroelectronics

Specifications of PSD835G2V-12U

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: TQFP
• Mounting: Surface Mount
• Pin Count: 80
• Lead Free Status / Rohs Status: Compliant

I/O ports
78/120
Table 14.
1. Can be multiplexed with other I/O functions.
Table 15.
1. N/A = Not Applicable
2. Control register setting is not applicable to ports A, B and C.
3. The direction of the port A,B,C, and F pins are controlled by the Direction register ORed with the individual
4. Any of these three methods enables the JTAG pins on port E.
Address Out
Address In
Data port
Peripheral I/O
JTAG ISP
Data port (Port F)
(Port A,B,C,D, F)
Peripheral I/O
(Port E, F, G)
Address Out
output enable product term (.oe) from the CPLD AND Array.
JTAG ISP
Address In
MCU I/O
PLD I/O
(Port F)
Mode
Port mode
(4)
Port operating modes (continued)
Port operating mode settings
Defined in PSDsoft
Declare pins or logic
equations for input
Selected for MCU
with non-mux bus
Declare pins only
Declare pins only
Declare pins only
Declare pins and
Logic equations
logic equations
(PSEL0 & 1)
macrocells
Port A
Yes
No
No
No
No
Doc ID 10585 Rev 3
Port B
Yes
No
No
No
No
register
Control
setting
Port C
N/A
N/A
N/A
N/A
N/A
0
Yes
1
No
No
No
No
(2)
(1)
Port D
1 = output,
Direction
Yes
0 = input
No
No
No
No
register
setting
N/A
N/A
N/A
N/A
1
(3)
(3)
(3)
Yes (A7-
Port E
Yes
A0)
No
No
No
VM register
PIO bit = 1
(1)
setting
N/A
N/A
N/A
N/A
N/A
N/A
Yes (A7-
Port F
A0)
Yes
Yes
Yes
No
JTAG_Enable
JTAG enable
PSD835G2V
N/A
N/A
N/A
N/A
N/A
N/A
(A15-A8)
Yes (A7-
Port G
A0) or
No
No
No
No