PSD835G2V-12U STMicroelectronics, PSD835G2V-12U Datasheet - Page 38

• Manufacturer Part Number: PSD835G2V-12U
• Manufacturer: STMicroelectronics

Specifications of PSD835G2V-12U

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: TQFP
• Mounting: Surface Mount
• Pin Count: 80
• Lead Free Status / Rohs Status: Compliant

Instructions
7.3
7.4
7.5
7.6
Table 8.
1. X = Not guaranteed value, can be read either '1' or '0.'
2. DQ7-DQ0 represent the Data Bus bits, D7-D0.
3. FS0-FS7 and CSBOOT0-CSBOOT3 are active high.
38/120
Flash memory
Functional block
cycle that is currently in progress. Lastly, the MCU may use instructions to read special data
from these memory blocks. The following sections describe these READ functions.
Read Memory Contents
Primary Flash memory and secondary Flash memory are placed in the READ mode after
Power-up, chip reset, or a Reset Flash instruction (see
memory contents of the primary Flash memory or the secondary Flash memory by using
READ operations any time the READ operation is not part of an instruction.
Read Primary Flash Identifier
The primary Flash memory identifier is read with an instruction composed of 4 operations: 3
specific WRITE operations and a READ operation (see
is E8h.
Read Memory Sector Protection Status
The primary Flash memory Sector Protection Status is read with an instruction composed of
4 operations: 3 specific WRITE operations and a READ operation (see
operation produces 01h if the Flash memory sector is protected, or 00h if the sector is not
protected.
The sector protection status for all NVM blocks (primary Flash memory or secondary Flash
memory) can also be read by the MCU accessing the Flash Protection and Flash Boot
Protection registers in PSD I/O space. See
page 46
Read the Erase/Program Status bits
The PSD provides several status bits to be used by the MCU to confirm the completion of an
Erase or Program cycle of Flash memory. These status bits minimize the time that the MCU
spends performing these tasks and are defined in
many times as needed.
For Flash memory, the MCU can perform a READ operation to obtain these status bits while
an Erase or Program instruction is being executed by the embedded algorithm. See
Section 8: Programming Flash memory
Status bit
V
FS0-FS7/CSBOOT0-
IH
for register definitions.
(1)(2)(3)
CSBOOT3
Polling
Data
DQ7
Doc ID 10585 Rev 3
Toggle
DQ6
flag
for details.
Section 10.1: Flash Memory Sector Protect on
Error
DQ5
flag
Table
DQ4
Table
Table
X
8. The status bits can be read as
7). The identifier for the device
7). The MCU can read the
Erase
Time-
DQ3
out
DQ2
Table
X
7). The READ
DQ1
PSD835G2V
X
DQ0
X