PEF2054NV21XT Lantiq, PEF2054NV21XT Datasheet - Page 146

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PEF2054NV21XT

Manufacturer Part Number
PEF2054NV21XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2054NV21XT

Lead Free Status / Rohs Status
Compliant
The Procedure for Reading the CM Code is
W:MAAR
W:MACR
wait for STAR:MAC = 0
R:MADR =
CMC3 … 0: CM code, refer to table 24
Figure 54 illustrates this behavior.
Figure 54
Read Access to the Control Memory Code Field
Semiconductor Group
MACR:
1
1
= CFI time slot address encoded according to figure 48
= 1111 XXXX
bit 7
1
1
X
X X
X
X
X
Up-
stream
B
Down-
stream
MADR:
CFI
Frame
X
X
0
0
127
127
X
X X
146
MD3
Control Memory
X
Code Field
MD2
MD1
CMC3
MD0 MAAR:
CMC2
U/D = 1
U/D = 0
U/D
MA6
Application Hints
.
CMC1
.
.
PEB 2055
PEF 2055
.
bit 0
ITD08069
. MA0
CMC0

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