PEF2054NV21XT Lantiq, PEF2054NV21XT Datasheet - Page 46

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PEF2054NV21XT

Manufacturer Part Number
PEF2054NV21XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2054NV21XT

Lead Free Status / Rohs Status
Compliant
Semiconductor Group
4
4.1
Group
PCM
interface
CFI
interface
Memory
access
Synchro-
nous
transfer
Detailed Register Description
Register Address Arrangement
Reg.
Name
PMOD
PBNR
POFD
POFU
PCSR
PICM
CMD1
CMD2
CBNR
CTAR
CBSR
CSCR
MACR
MAAR
MADR
STDA
STDB
SARA
SARB
SAXA
SAXB
STCR
Access
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
Address
mux
AD7..0
20
22
24
26
28
2A
2C
2E
30
32
34
36
00
02
04
06
08
0A
0C
0E
10
12
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Address
demux
OMDR:RBS/
A3..0
1/0
1/1
1/2
1/3
1/4
1/5
1/6
1/7
1/8
1/9
1/A
1/B
0/0
0/1
0/2
0/3
0/4
0/5
0/6
0/7
0/8
0/9
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
46
Reset
Value
00
FF
00
00
00
xx
00
00
FF
00
00
00
xx
xx
xx
xx
xx
xx
xx
xx
xx
00xxxx
xx
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Detailed Register Description
Comment
PCM-mode reg.
PCM-bit number reg.
PCM-offset downstream
reg.
PCM-offset upstream reg.
PCM-clock shift reg.
PCM-input comparison
mismatch reg.
CFI-mode reg. 1
CFI-mode reg. 2
CFI-bit number reg.
CFI time slot adjustment
reg.
CFI-bit shift reg.
CFI-subchannel reg.
Memory access control
reg.
Memory access address
reg.
Memory access data reg.
Synchron transfer data
reg. A
Synchron transfer data
reg. B
Synchron transfer receive
address reg. A
Synchron transfer receive
address reg. B
Synchron transfer transmit
address reg. A
Synchron transfer transmit
address reg. B
Synchron transfer control
reg.
PEB 2055
PEF 2055
Refer to
page
48
50
50
51
51
52
53
55
58
58
59
60
61
65
66
67
67
68
69
69
70
70

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