PEF2054NV21XT Lantiq, PEF2054NV21XT Datasheet - Page 69

• Manufacturer Part Number: PEF2054NV21XT
• Manufacturer: Lantiq

Specifications of PEF2054NV21XT

• Lead Free Status / Rohs Status: Compliant

Access in multiplexed P-interface mode:
Access in multiplexed P-interface mode:
4.2.4.4 Synchronous Transfer Receive Address Register B (SARB)
Access in demultiplexed P-interface mode:
Reset value: xx
The SARB register specifies for synchronous transfer channel B from which input
interface, port and time slot the serial data is extracted. This data can then be read from
the STDB register.
ISRB
MTRB6..0
4.2.4.5 Synchronous Transfer Transmit Address Register A (SAXA)
Access in demultiplexed P-interface mode:
Reset value: xx
The SAXA register specifies for synchronous transfer channel A to which output
interface, port and time slot the serial data contained in the STDA register is sent.
ISXA
MTXA6..0
Semiconductor Group
bit 7
bit 7
ISRB
ISXA
MTRB6
Interface Select Receive for channel B.
0… selects the PCM interface as the input interface for synchronous
1… selects the CFI-interface as the input interface for synchronous
number at the interface selected by ISRB according to tables 3 and 4:
MTRB6..0 = MA6..0.
MTXA6
Interface Select Transmit for channel A.
0… selects the PCM interface as the output interface for synchronous
1… selects the CFI interface as the output interface for synchronous
number at the interface selected by ISXA according to tables 3 and 4:
MTXA6..0 = MA6..0.
P-Transfer Receive Address for channel B; selects the port and time slot
P-Transfer Transmit Address for channel A; selects the port and time slot
H
H
channel B.
channel B.
channel A.
channel A.
MTRB5
MTXA5
MTRB4
MTXA4
69
MTRB3
MTXA3
read/write
read/write
read/write
read/write
Detailed Register Description
MTRB2
MTXA2
address: 6
address: 7
OMDR:RBS = 0
address: 0C
OMDR:RBS = 0
address: 0E
MTRB1
MTXA1
PEB 2055
PEF 2055
H
H
bit 0
bit 0
H
H
MTRB0
MTXA0