GCIXP1200GC Intel, GCIXP1200GC Datasheet - Page 61

• Manufacturer Part Number: GCIXP1200GC
• Description: IC MPU NETWORK 232MHZ 432-BGA
• Manufacturer: Intel

Specifications of GCIXP1200GC

• Rohs Status: RoHS non-compliant
• Processor Type: Network
• Features: 32-bit StrongARM RISC Core
• Speed: 232MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 432-BGA
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 839429

Datasheet
Table 27. 32-bit Unidirectional IX Bus, 3+ MAC Mode
GPIO[3:1]
PORTCTL#[3:2]
GPIO[0]/FC_EN0#/TXPEN
TK_REQ_OUT/SOP_TX
TK_REQ_IN/EOP_TX
TXASIS/TXERR
FBE#[7:4]
FDAT[63:31]
Receive Path Signals
FPS[2:0]
PORTCTL#[1:0]
RDYCTL#[4]/FC_EN1#/
RXPEN#
SOP/SOP_RX
EOP/EOP_RX
RXFAIL
FBE#[3:0]
FDAT[31:0]
Control Signals Common to both Transmit/Receive Paths
RDYCTL#[3:0]
RDYBUS[7:0]
TK_IN
TK_OUT
FAST_RX1
FAST_RX2
Transmit Path Signals
Active high outputs, Transmit Port Selects [2:0].
Active Low, outputs.
Used with GPIO[0]/FC_EN0#/TXPEN for transmit device select via external
2-to-4 decoder.
Active High, output, transmit enable.
Used with PORTCTL#[3:2] for transmit device select via external 2-to-4
decoder.
Active High, output, transmit Start of Packet. TK_REQ_OUT/SOP_TX is output
during transmit according to values programmed in the TFIFO control field.
Active High, output, transmit End of Packet. TK_REQ_IN/EOP_TX is output
during transmit according to values programmed in the TFIFO control field.
Active High, output. TXASIS/TXERR states are output according to values
programmed in the TFIFO Control field. TXASIS state is output coincident with
TK_REQ_OUT/SOP_TX signal, TXERR state is output coincident with
TK_REQ_IN/EOP_TX signal.
Active Low, output, byte enables for FDAT [63:31].
Active High, output, 32-bit transmit data.
Active High, output. Receive Port Selects [2:0].
Active Low, output. Used with RDYCTL#[4]/FC_EN1#/RXPEN# for receive
device select via external 2-to-4 decoder.
Active Low, output, receive enable. Used to enable an external 2-to-4 decoder.
Used with PORTCTL#[1:0].
Active High, input/output, input receive Start of Packet from the MAC. Driven as
output when bus remains in No-Select state.
Active High, input/output, input receive End of Packet from the MAC. Driven as
output when bus remains in No-Select state.
Active Low, input/output, input Receive Error indication from the MAC. Driven as
output when bus remains in No-Select state.
Active High, input/output, input byte enables for FDAT [31:0] from the MAC.
Driven as output when bus remains in No-Select state.
Active High, input/output, input 32-bit receive data from the MAC. Driven as
output when bus remains in No-Select state.
Output, 4 bits encoded for Transmit/Receive Ready flags, flow-control, and
inter-chip communication. Decode with external 4-to-16 decoder.
Active High, input/output, Transmit or Receive Ready flags, and flow control
mask data.
Input, not used, must be pulled High in this mode.
Output, not used, no connect.
Active High, ready input from Fast Port 0, pulldown 10 KOhms if not used.
Active High, ready input from Fast Port 1, pulldown 10 KOhms if not used.
Description
Intel
®
IXP1200 Network Processor
61