MC68MH360AI33L Freescale Semiconductor, MC68MH360AI33L Datasheet - Page 89

• Manufacturer Part Number: MC68MH360AI33L
• Description: IC MPU QUICC 33MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360AI33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

IMMR + 3F37
IMMR + 3F38
IMMR + 3F7F
IMMR + 3F80
IMMR + 3FB7
IMMR + 3FB8
IMMR + 3FBF
IMMR + 3FC0
IMMR + 3FFF
IMMR + 3F00
IMMR + 3FA3
IMMR + 3FA4
IMMR + 3FBF
IMMR + 3FC0
IMMR + 3FFF
IMMR + 3F00
#—TSATRx & TSATTx are mapped to an alternative SCC’s parameter RAM.
* —SMC2 is not available in these configurations due to memory conflict.
Transparent
Transparent Regs
= 56 Bytes
Ethernet Regs
= 164 Bytes
Ethernet
Free Area
= 72Bytes
DSP2 Regs
= 64Bytes
DSP2 Regs
= 64Bytes
SMC2 Regs
= 56 Bytes
Free Area
= 8 Bytes
Free Area
= 28 Bytes
Figure 5-15. MPC860MH SCC4 Parameter RAM Usage
Freescale Semiconductor, Inc.
Locations used
for SCC registers
For More Information On This Product,
*
IMMR + 3F00
IMMR + 3F5B
IMMR + 3F5C
IMMR + 3F7F
IMMR + 3F80
IMMR + 3FB7
IMMR + 3FB8
IMMR + 3FBF
IMMR + 3FC0
IMMR + 3FFF
IMMR + 3F00
IMMR + 3FAB
IMMR + 3FAC
IMMR + 3FBF
IMMR + 3FC0
IMMR + 3FFF
Go to: www.freescale.com
Chapter 5. Buffer Descriptors
HDLC Regs
= 92 Bytes
Free Area
= 36 Bytes
QMC Regs
= 172 Bytes
DSP2 Regs
= 64Bytes
DSP2 Regs
= 64Bytes
SMC2 Regs
= 56 Bytes
Free Area
= 8 Bytes
Free Area
= 20Bytes
HDLC
QMC
Locations free
for BD
*
IMMR + 3F65
IMMR + 3F66
IMMR + 3F7F
IMMR + 3F80
IMMR + 3FB7
IMMR + 3FB8
IMMR + 3EBF
IMMR + 3FC0
IMMR + 3FFF
IMMR + 3F00
IMMR + 3F1F
IMMR + 3F20
IMMR + 3F9F
IMMR + 3FA0
IMMR + 3FAB
IMMR + 3FAC
IMMR + 3FBF
IMMR + 3FC0
IMMR + 3FFF
IMMR + 3F00
QMC on
Multiple SCCs
QMC Regs
=12 Bytes
UART Regs
= 102 Bytes
Locations used
for secondary
registers
QMC Regs
= 32 Bytes
SMC2 Regs
= 56 Bytes
Free Area
= 8 Bytes
DSP2 Regs
= 64Bytes
Free Area
= 128 Bytes
Free Area
= 20Bytes
DSP2 Regs
= 64Bytes
UART
Free Area
= 26 Bytes
*#