MC68MH360AI33L Freescale Semiconductor, MC68MH360AI33L Datasheet - Page 95

• Manufacturer Part Number: MC68MH360AI33L
• Description: IC MPU QUICC 33MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360AI33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

A typical setting would be:
Step 10. Initialize general SCCx mode reg low, GSMR_L (see Table 6-5). For more
information on GSMR programming, see page 7-111 of the MC68360 User’s Manual and
page 16-153 of the MPC860 User’s Manual.
SIR
EDGE
TCI
TSNC
RINV
TINV
TPL
TPP
Tend
TDCR
RDCR
RENC
TENC
DIAG
ENR
ENT
MODE
CDS
CTSS
TFL
RFW
TXSY
SYNL
RTSM
RSYN
Name
Name
GSMR_H = 0x0000_0780;
No. of Bits
Freescale Semiconductor, Inc.
No. of Bits
Table 6-4. GSMR_H Bit Settings (Continued)
For More Information On This Product,
1
1
1
1
1
2
1
1
1
2
1
2
1
1
3
2
1
2
2
2
2
2
1
1
4
Table 6-5. GSMR_L Bit Settings
CD sampling
CTS sampling
Transmit FIFO length
Receive FIFO width
Transmitter synchronized to the receiver
Sync length
RTS mode
Receive synchronization timing
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Chapter 6. QMC Initialization
Infrared encoding, only on 860MH
Clock edge
Transmit clock invert
Transmit sense
DPLL receive input invert data
DPLL transmit input invert data
Tx preamble length
Tx preamble pattern
Transmitter frame ending
Transmit divide clock rate
Receive divide clock rate
Receive decoding
Transmitter decoding
Diagnostic mode
Enable receive
Enable transmit
Channel protocol mode
/* enable pulse mode and sampling */
Description
Description
1
1
0
0
0
00b
0
0
X
00
0
00b
0
0
0b000
0b00
0
00
00
00
00
system-specific
0
0
0b1010
Setting
Setting