DS21FF42 Maxim Integrated Products, DS21FF42 Datasheet - Page 65

• Manufacturer Part Number: DS21FF42
• Description: IC FRAMER T1 4X4 16CH 300-BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS21FF42

• Controller Type: T1 Framer
• Interface: Parallel/Serial
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 300mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 300-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

HDLC/BOC CONTROLLER REGISTER LIST Table 18-1
19.1.2 Status Register for the HDLC
Four of the HDLC/BOC controller registers (HSR, RHIR, RBOC, and THIR) provide status information.
When a particular event has occurred (or is occurring), the appropriate bit in one of these four registers
will be set to a one. Some of the bits in these four HDLC status registers are latched and some are real
time bits that are not latched. Section 19.1.4 contains register descriptions that list which bits are latched
and which are not. With the latched bits, when an event occurs and a bit is set to a one, it will remain set
until the user reads that bit. The bit will be cleared when it is read and it will not be set again until the
event has occurred again. The real time bits report the current instantaneous conditions that are occurring
and the history of these bits is not latched.
HDLC Control Register (HCR)
HDLC Status Register (HSR)
HDLC Interrupt Mask Register (HIMR)
Receive HDLC Information Register (RHIR)
Receive BOC Register (RBOC)
Receive HDLC FIFO Register (RHFR)
Receive HDLC DS0 Control Register 1 (RDC1)
Receive HDLC DS0 Control Register 2 (RDC2)
Transmit HDLC Information Register (THIR)
Transmit BOC Register (TBOC)
Transmit HDLC FIFO Register (THFR)
Transmit HDLC DS0 Control Register 1 (TDC1)
Transmit HDLC DS0 Control Register 2 (TDC2)
NAME
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general control over the HDLC and BOC
controllers
key status information for both transmit and
receive directions
allows/stops status bits to/from causing an
interrupt
status information on receive HDLC controller
access to 64–byte HDLC FIFO in receive
direction
controls the HDLC function when used on DS0
channels
status information on transmit HDLC controller
enables/disables transmission of BOC codes
access to 64–byte HDLC FIFO in transmit
direction
controls the HDLC function when used on DS0
channels
status information on receive BOC controller
FUNCTION