DS21FF42 Maxim Integrated Products, DS21FF42 Datasheet - Page 70

IC FRAMER T1 4X4 16CH 300-BGA

DS21FF42

Manufacturer Part Number
DS21FF42
Description
IC FRAMER T1 4X4 16CH 300-BGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21FF42

Controller Type
T1 Framer
Interface
Parallel/Serial
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
300mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
300-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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RHIR: RECEIVE HDLC INFORMATION REGISTER (Address = 03 Hex)
NOTE:
The RABT, RCRCE, ROVR, and RVM bits are latched and will be cleared when read.
(MSB)
RABT
SYMBOL
SYMBOL
REMPTY
TMEND
RCRCE
CBYTE
OBYTE
ROVR
RABT
RVM
POK
TNF
RCRCE
POSITION
POSITION
HIMR.1
HIMR.0
RHIR.7
RHIR.6
RHIR.5
RHIR.4
RHIR.3
RHIR.2
RHIR.1
RHIR.0
ROVR
NAME AND DESCRIPTION
NAME AND DESCRIPTION
Transmit FIFO Not Full.
0 = interrupt masked
1 = interrupt enabled
Transmit Message End.
0 = interrupt masked
1 = interrupt enabled
Abort Sequence Detected. Set whenever the HDLC
controller sees 7 or more ones in a row.
CRC Error. Set when the CRC checksum is in error.
Overrun. Set when the HDLC controller has attempted to
write a byte into an already full receive FIFO.
Valid Message. Set when the HDLC controller has detected
and checked a complete HDLC packet.
Empty. A real–time bit that is set high when the receive
FIFO is empty.
Packet OK. Set when the byte available for reading in the
receive FIFO at RHFR is the last byte of a valid message (and
hence no abort was seen, no overrun occurred, and the CRC
was correct).
Closing Byte. Set when the byte available for reading in the
receive FIFO at RHFR is the last byte of a message (whether
the message was valid or not).
Opening Byte. Set when the byte available for reading in the
receive FIFO at RHFR is the first byte of a message.
RVM
70 of 114
REMPTY
POK
CBYTE
OBYTE
(LSB)

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