SAF82532N10V32A Infineon Technologies, SAF82532N10V32A Datasheet - Page 42

• Manufacturer Part Number: SAF82532N10V32A
• Description: IC CONTROLLER 2-CH SER 68-PLCC
• Manufacturer: Infineon Technologies

Specifications of SAF82532N10V32A

• Controller Type: Serial Communications Controller (SCC)
• Interface: Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 8mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: SAF82532N10V32A; SAF82532N10V32AIN

Semiconductor Group
3
3.1
The communication between the CPU and the ESCC2 is done via a set of directly
accessible registers. The interface may be configured as Siemens/Intel or Motorola type
with a selectable data bus width of 8 or 16 bits.
The CPU transfers data to/from the ESCC2 (via 64 byte deep FIFOs per direction and
channel), sets the operating modes, controls function sequences, and gets status
information by writing or reading control/status registers. All accesses can be done as
byte or word accesses if enabled. If 16-bit bus width is selected, access to lower/upper
part of the data bus is determined by address line A0 and signal BHE/BLE as shown in
table 1 and 2.
Mixed Byte/Word Access to the FIFOs
Reading from or writing to the internal FIFOs (RFIFO and XFIFO of each channel) can
be done using an 8-bit (byte) or 16-bit (word) access depending on the selected bus
interface mode. In version 1 of ESCC2, byte access in the case of 16-bit bus interface
mode is allowed if not mixed with word accesses when reading from or writing to the
same pool.
In version 2.x upward randomly mixed byte/word access to the FIFOs is allowed with the
restriction that in HDLC mode and BISYNC mode 32 bytes have to be written to the
internal FIFO when only XTF (HDLC) command or XF (BISYNC) command is set
afterwards. There is no restriction when XTF and XME (HDLC) or XF and XME
(BISYNC) is set afterwards.
Table 1
Data Bus Access (16-bit Intel mode)
BHE
0
0
1
1
Microprocessor Interface
Register Set
A0
0
1
0
1
Register Access
FIFO word access
Register word access (even addresses)
Register byte access (odd addresses)
Register byte access (odd addresses)
No transfer performed
42
ESCC2 Data Pins Used
D0 … D15
D8 … D15
D0 … D7
None
Microprocessor Interface
SAB 82532/SAF 82532
07.96