PSB3186FV14XT Lantiq, PSB3186FV14XT Datasheet - Page 109

• Manufacturer Part Number: PSB3186FV14XT
• Manufacturer: Lantiq

Specifications of PSB3186FV14XT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

• The host reads the first data block from RFIFOD and acknowledges the reception by
• The second 32 byte block is indicated by RPF which is read and acknowledged by the
• The reception of the remaining 4 bytes plus RSTAD are indicated by RME (i.e. the
• The host gets the number of bytes (COUNT = 5) from RBCLD/RBCHD and reads out
• The second frame is received and indicated by RME interrupt.
• The host gets the number of bytes (COUNT = 13) from RBCLD/RBCHD and reads out
• The third frame is transferred in the same way.
Figure 62
3.8.2.2
The management of the received HDLC frames as affected by the different operating
modes (see
Data Sheet
Receive
Frame
RMC. Meanwhile the second data block is received and stored in RFIFOD.
host as described before.
receive status is always appended to the end of the frame).
the RFIFOD and optionally the status register RSTA. The frame is acknowledged by
RMC.
the RFIFOD and optionally the status register. The RFIFOD is acknowledged by RMC.
32
RPF
Receive Frame Structure
32 Bytes
Chapter
RD
Reception Sequence Example
Bytes
32
68
RMC
RPF
3.8.1) is shown in
4
32 Bytes
Bytes
RD
12
12
RMC
Bytes
12
12
RME
Count
RD
Figure
CPU Interface
IOM Interface
*
5 Bytes
1)
109
RD
The last byte contains the receive status information <RSTA>
*
1)
RMC
63.
RME
Description of Functional Blocks
Count
RD
13 Bytes
RD
*
1)
RMC RME
Count
RD
ISAC-SX TE
PSB 3186
13 Bytes
2003-01-30
RD
*
fifoseq_rec.vsd
1)
RMC