PSB3186FV14XT Lantiq, PSB3186FV14XT Datasheet - Page 41

• Manufacturer Part Number: PSB3186FV14XT
• Manufacturer: Lantiq

Specifications of PSB3186FV14XT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Figure 16
Frame Structure
Each S/T frame consists of 48 bits at a nominal bit rate of 192 kbit/s. For user data
(B1+B2+D) the frame structure applies to a data rate of 144 kbit/s (see
In the direction TE ® NT the frame is transmitted with a two bit offset. For details on the
framing rules please refer to ITU I.430 section 6.3. The following figure illustrates the
standard frame structure for both directions (NT ® TE and TE ® NT) with all framing
and maintenance bits.
Figure 17
Note: The ITU I.430 standard specifies S1 - S5 for optional use.
Data Sheet
S/T -Interface Line Code
Frame Structure at Reference Points S and T (ITU I.430)
41
Description of Functional Blocks
0 1 1
Figure
code violation
ISAC-SX TE
PSB 3186
2003-01-30
17).