TMPM370FYDFG Toshiba, TMPM370FYDFG Datasheet - Page 251

• Manufacturer Part Number: TMPM370FYDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 256K FLASH, 10K RAM
• Manufacturer: Toshiba

Specifications of TMPM370FYDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: QFP(14x20)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit
• Lead Free Status / Rohs Status: Details

(0x4005_0010)
(0x4005_0014)
VETRGMODE
VEREPTIME
15.4.1.5
15.4.1.6
<VREPA> Specifies the repeat times a schedule is to be executed in channel 0.
<VREPB> Specifies the repeat times a schedule is to be executed in channel 1.
<VTRGA> Specifies the AD conversion end interrupt that triggers input processing in channel 0.
<VTRGB> Specifies the AD conversion end interrupt that triggers input processing in channel 1.
bit Symbol
Read/Write
After reset
bit Symbol
Read/Write
After reset
* When “0” is set, no schedule is executed.
Read/Write
Read/Write
bit Symbol
After reset
bit Symbol
After reset
Function
Function
Function
Function
VEREPTIME Register
VETRGMODE Register
Channel 1 repeat count
0: Do not execute schedule
1-15: Execute schedule a specified number of
times
31
31
7
7
6
6
VREPB
0x0
－
R/W
R
0x0
TMPM370 15-10
5
5
・・・
・・・
4
4
0x000000
0x000000
Channel 1 trigger mode
00: Ignore both INTB0
01: Start by INTB0 (unit A)
10: Start by INTB1 (unit
11: Start when both
－
－
R
R
Channel 0 repeat count
0: Do not execute schedule
1-15: Execute schedule a specified number of
times
(unit A) and INTB1
(unit B)
B)
INTB0 (unit A) and
INTB1 (unit B) occur
3
3
VTRGB
R/W
00
2
2
VREPA
R/W
0x0
Channel 0 trigger mode
00: Ignore both INTA0
01: Start by INTA0 (unit A)
10: Start by INTA1 (unit B)
11: Start when both
(unit A) and INTA1
(unit B)
INTA0 (unit A) and
INTA1 (unit B) occur
Vector Engine (VE)
1
9
1
9
VTRGA
R/W
00
TMPM370
8
0
8
0