TMPM370FYDFG Toshiba, TMPM370FYDFG Datasheet - Page 455

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TMPM370FYDFG

Manufacturer Part Number
TMPM370FYDFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 256K FLASH, 10K RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMPM370FYDFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
256K
Rom Type
Flash
Ram (kbytes)
10K
Number Of Pins
100
Package
QFP(14x20)
Vcc
5V
Cpu Mhz
80
Ssp (ch) Spi
-
I2c/sio (ch)
-
Uart/sio (ch)
4
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
27
16-bit Timer / Counter
8
Motor / Igbt Control
Vector Engine
Real Time Clock
-
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
4
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM370FYDFG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
21.4 Writing and erasing
21.4.1 Protection bits
21.4.2 Security bit
1) Write the code 0xa74a9d23 to FCSECBIT register.
2) Write data within 16 clocks from the writing above.
Note) The above procedure is enabled only when using 32-bit data transfer command.
Writing and erasing protection bits are available with a single chip mode, single boot mode and
writer mode.
Writing to the protection bits is done on block-by-block basis.
Erasing of the protection bits is done by two groups of the blocks: block 0 through 3 and block 4
through 5. When the settings for all the blocks are “1”, erasing must be done after clearing the
FCSECBIT <SECBIT> bit to “0”. An attempt to erase protection bits when <SECBIT> bit is “1”, it will
erases all the contents of flash memory include protection bits. To write and erase the protection bits,
command sequence is used.
See chapter 18 for details.
The FCSECBIT <SECBIT> bit that activates security function is set to “1” at a power-on reset right
after power-on. It can be Rewritten at single chip mode and single boot mode.by the following
procedure.
TMPM370 21-5
Protect/security function
TMPM370

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