TMPM370FYDFG Toshiba, TMPM370FYDFG Datasheet - Page 443

• Manufacturer Part Number: TMPM370FYDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 256K FLASH, 10K RAM
• Manufacturer: Toshiba

Specifications of TMPM370FYDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: QFP(14x20)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit
• Lead Free Status / Rohs Status: Details

FCFLCS
0x41FF_F020
(5) Flash control/ status register
This resister is used to monitor the status of the flash memory and to indicate the protection status of
each block.
Bit 0: Ready/Busy flag bit
Bit [21:16]: Protection status bits
bit Symbol
Read/Write
After reset
bit Symbol
Read/Write
After reset
bit Symbol
Read/Write
After reset
bit Symbol
Read/Write
After reset
Function
Function
Function
Function
The RDY/BSY output is provided as a means to monitor the status of automatic operation.
This bit is a function bit for the CPU to monitor the function. When the flash memory is in
automatic operation, it outputs "0" to indicate that it is busy. When the automatic operation
is terminated, it returns to the ready state and outputs "1" to accept the next command. If
the automatic operation has failed, this bit maintains the "0" output. By applying a
hardware reset, it returns to "1."
Each of the protection bits represents the protection status of the corresponding block.
When a bit is set to "1," it indicates that the block corresponding to the bit is protected.
When the block is protected, data cannot be written to it.
31
23
15
7
-
-
-
-
“0” i s read.
Table 20-15 Flash Control Register
R
0
30
22
14
6
-
-
-
-
TMPM370 20-51
Protection
for Block 5
0: disabled
（ Note 2 ） （ Note 2 ） （ Note 2 ） （ Note 2 ） （ Note 2 ） （ Note 2 ）
1:enabled
BLPRO5
29
21
13
R
5
-
-
-
Protection
for Block 4
0: disabled
1:enabled
BLPRO4
“0” i s read.
28
20
12
R
4
R
-
-
0
-
“0” i s read.
“0” i s read.
R
R
0
0
Protection
for Block 3
0: disabled
1:enabled
BLPRO3
27
19
11
R
3
-
-
-
Protection
for Block 2
0: disabled
1:enabled
Flash Memory Operation
BLPRO2
26
18
10
R
2
-
-
-
Protection
for Block 1
0: disabled
1:enabled
BLPRO1
25
17
R
9
1
-
-
-
TMPM370
Protection
for Block 0
0: disabled
1:enabled
0:Auto
operating
Ready/Bus
y (Note 1)
terminated
RDY/BSY
BLPRO0
operation
1:Auto
24
16
R
8
0
R
1
-
-