ADV7393BCPZ Analog Devices Inc, ADV7393BCPZ Datasheet - Page 2

• Manufacturer Part Number: ADV7393BCPZ
• Description: IC DAC VIDEO HDTV 10BIT 40LFCSP
• Manufacturer: Analog Devices Inc
• Type: Video Encoderr

Specifications of ADV7393BCPZ

• Design Resources: Reconstruction Video Filter Using ADA4430-1 Amplifier After ADV7393 Video Encoder (CN0101)
• Applications: Set-Top Boxes, Video Players, Displays
• Voltage - Supply, Analog: 2.6 V ~ 3.46 V
• Voltage - Supply, Digital: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Package / Case: 40-LFCSP
• Input Format: Digital
• Output Format: Analog
• Supply Voltage Range: 1.71V To 1.89V
• Operating Temperature Range: -40°C To +85°C
• Tv / Video Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADV7393-DBRDZ - BOARD EVAL FOR ADV7393EVAL-ADV7393EBZ - BOARD EVAL FOR ADV7393 ENCODER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADV7390/ADV7391/ADV7392/ADV7393
TABLE OF CONTENTS
Features .............................................................................................. 1
Revision History ............................................................................... 3
Applications ....................................................................................... 5
General Description ......................................................................... 5
Functional Block Diagrams ............................................................. 6
Specifications ..................................................................................... 7
Absolute Maximum Ratings .......................................................... 18
Pin Configurations and Function Descriptions ......................... 19
Typical Performance Characteristics ........................................... 21
MPU Port Description ................................................................... 26
Register Map Access ....................................................................... 28
ADV7390/ADV7391 Input Configuration ................................. 45
ADV7392/ADV7393 Input Configuration ................................. 46
Output Configuration .................................................................... 48
Design Features ............................................................................... 49
Power Supply Specifications........................................................ 7
Input Clock Specifications .......................................................... 7
Analog Output Specifications ..................................................... 7
Digital Input/Output Specifications—3.3 V ............................. 8
Digital Input/Output Specifications—1.8 V ............................. 8
MPU Port Timing Specifications ............................................... 8
Digital Timing Specifications—3.3 V ........................................ 9
Digital Timing Specifications—1.8 V ...................................... 10
Video Performance Specifications ........................................... 11
Power Specifications .................................................................. 11
Timing Diagrams ........................................................................ 12
Thermal Resistance .................................................................... 18
ESD Caution ................................................................................ 18
I
Register Programming ............................................................... 28
Subaddress Register (SR7 to SR0) ............................................ 28
Standard Definition .................................................................... 45
Enhanced Definition/High Definition .................................... 45
Enhanced Definition (at 54 MHz) ........................................... 45
Standard Definition .................................................................... 46
Enhanced Definition/High Definition .................................... 47
Enhanced Definition (at 54 MHz) ........................................... 47
Output Oversampling ................................................................ 49
ED/HD Nonstandard Timing Mode........................................ 49
2
C Operation .............................................................................. 26
Rev. B | Page 2 of 108
Printed Circuit Board Layout and Design .................................. 69
HD Interlace External HSYNC and VSYNC
Considerations ............................................................................ 50
ED/HD Timing Reset ................................................................ 50
SD Subcarrier Frequency Lock, Subcarrier Reset, and
Timing Reset ............................................................................... 50
SD VCR FF/RW Sync ................................................................ 51
Vertical Blanking Interval ......................................................... 51
SD Subcarrier Frequency Control ............................................ 52
SD Noninterlaced Mode ............................................................ 52
SD Square Pixel Mode ............................................................... 52
Filters ............................................................................................ 54
ED/HD Test Pattern Color Controls ....................................... 55
Color Space Conversion Matrix ............................................... 55
SD Luma and Color Scale Control ........................................... 57
SD Hue Adjust Control .............................................................. 57
SD Brightness Detect ................................................................. 57
SD Brightness Control ............................................................... 57
SD Input Standard Autodetection ............................................ 58
Double Buffering ........................................................................ 58
Programmable DAC Gain Control .......................................... 58
Gamma Correction .................................................................... 59
ED/HD Sharpness Filter and Adaptive Filter Controls ......... 60
ED/HD Sharpness Filter and Adaptive Filter Application
Examples ...................................................................................... 61
SD Digital Noise Reduction ...................................................... 62
SD Active Video Edge Control ................................................. 64
External Horizontal and Vertical Synchronization Control . 65
Low Power Mode ........................................................................ 66
Cable Detection .......................................................................... 66
DAC Autopower-Down ............................................................. 66
Sleep Mode .................................................................................. 66
Pixel and Control Port Readback ............................................. 67
Reset Mechanisms ...................................................................... 67
SD Teletext Insertion ................................................................. 67
Unused Pins ................................................................................ 69
DAC Configurations .................................................................. 69
Video Output Buffer and Optional Output Filter .................. 69
Printed Circuit Board (PCB) Layout ....................................... 70
Additional Layout Considerations for the WLCSP Package 71
Typical Applications Circuit ..................................................... 72