PI7C8150BMAE Pericom Semiconductor, PI7C8150BMAE Datasheet - Page 8

• Manufacturer Part Number: PI7C8150BMAE
• Description: IC PCI-PCI BRIDGE ASYNC 208-FQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8150BMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 208-FQFP
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 510 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15
16
17
18
15.1
15.2
16.1
16.2
16.3
16.4
16.5
16.6
17.1
17.2
17.3
17.4
17.5
17.6
18.1
18.2
18.3
14.1.43
14.1.44
14.1.45
14.1.46
14.1.47
14.1.48
14.1.49
14.1.50
14.1.51
14.1.52
14.1.53
14.1.54
14.1.55
15.2.1
15.2.2
15.2.3
15.2.4
16.1.1
16.1.2
BRIDGE BEHAVIOR.................................................................................................................... 96
IEEE 1149.1 COMPATIBLE JTAG CONTROLLER................................................................ 97
ELECTRICAL AND TIMING SPECIFICATIONS................................................................. 103
PACKAGE INFORMATION...................................................................................................... 107
BRIDGE ACTIONS FOR VARIOUS CYCLE TYPES .............................................................. 96
ABNORMAL TERMINATION (INITIATED BY BRIDGE MASTER).................................... 96
BOUNDARY SCAN ARCHITECTURE..................................................................................... 97
BOUNDARY SCAN INSTRUCTION SET ................................................................................ 99
TAP TEST DATA REGISTERS................................................................................................ 100
BYPASS REGISTER ................................................................................................................. 100
BOUNDARY-SCAN REGISTER.............................................................................................. 100
TAP CONTROLLER ................................................................................................................. 100
MAXIMUM RATINGS ............................................................................................................. 103
DC SPECIFICATIONS.............................................................................................................. 104
AC SPECIFICATIONS.............................................................................................................. 105
66MHZ TIMING........................................................................................................................ 105
33MHZ TIMING........................................................................................................................ 106
POWER CONSUMPTION ........................................................................................................ 106
208-PIN FQFP PACKAGE DIAGRAM .................................................................................... 107
256-BALL PBGA PACKAGE DIAGRAM ............................................................................... 108
PART NUMBER ORDERING INFORMATION...................................................................... 108
MASTER ABORT................................................................................................................ 96
PARITY AND ERROR REPORTING ................................................................................ 96
REPORTING PARITY ERRORS ....................................................................................... 97
SECONDARY IDSEL MAPPING ...................................................................................... 97
TAP PINS ............................................................................................................................ 98
INSTRUCTION REGISTER .............................................................................................. 98
RETRY COUNTER REGISTER – OFFSET 78h .......................................................... 93
PRIMARY MASTER TIMEOUT COUNTER – OFFSET 80h ..................................... 93
SECONDARY MASTER TIMEOUT COUNTER – OFFSET 80h ............................... 93
CAPABILITY ID REGISTER – OFFSET B0h ............................................................. 93
NEXT POINTER REGISTER – OFFSET B0h ............................................................. 93
SLOT NUMBER REGISTER – OFFSET B0h .............................................................. 94
CHASSIS NUMBER REGISTER – OFFSET B0h ....................................................... 94
CAPABILITY ID REGISTER – OFFSET DCh............................................................. 94
NEXT ITEM POINTER REGISTER – OFFSET DCh ................................................. 94
POWER MANAGEMENT CAPABILITIES REGISTER – OFFSET DCh ................. 94
POWER MANAGEMENT DATA REGISTER – OFFSET E0h................................... 95
CAPABILITY ID REGISTER – OFFSET E4h ............................................................. 95
NEXT POINTER REGISTER – OFFSET E4h ............................................................. 95
Page 8 of 109
ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
April 2009 – Revision 1.08
PI7C8150B