PI7C8150BMAE Pericom Semiconductor, PI7C8150BMAE Datasheet - Page 90

• Manufacturer Part Number: PI7C8150BMAE
• Description: IC PCI-PCI BRIDGE ASYNC 208-FQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8150BMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 208-FQFP
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 510 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.1.39
14.1.40
GPIO DATA AND CONTROL REGISTER – OFFSET 64h
SECONDARY CLOCK CONTROL REGISTER – OFFSET 68h
Bit
11:8
15:12
19:16
23:20
27:24
31:28
Bit
1:0
3:2
5:4
7:6
8
9
10
11
12
13
15:14
Function
GPIO Output
Write-1-to-Clear
GPIO Output
Write-1-to-Set
GPIO Output
Enable Write-1-
to-Clear
GPIO Output
Enable Write-1-
to-Set
Reserved
GPIO Input Data
Register
Function
Clock 0 disable
Clock 1 disable
Clock 2 disable
Clock 3 disable
Clock 4 disable
Clock 5 disable
Clock 6 disable
Clock 7 disable
Clock 8 disable
Clock 9 disable
Reserved
Type
R/WC
R/WS
R/WC
R/WS
R
R/O
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
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Description
Writing 1 to any of these bits drives the corresponding bit LOW on
the GPIO[3:0] bus if it is programmed as bidirectional. Data is
driven on the PCI clock cycle following completion of the
configuration write to this register. Bit positions corresponding to
GPIO pins that are programmed as input only are not driven. Writing
0 has no effect and will show last the last value written when read.
Reset to 0.
Writing 1 to any of these bits drives the corresponding bit HIGH on
the GPIO[3:0] bus if it is programmed as bidirectional. Data is
driven on the PCI clock cycle following completion of the
configuration write to this register. Bit positions corresponding to
GPIO pins that are programmed as input only are not driven. Writing
0 has no effect and will show last the last value written when read.
Reset to 0.
Writing 1 to and of these bits configures the corresponding
GPIO[3:0] pin as an input only. The output driver is tristated.
Writing 0 to this register has no effect and will reflect the last value
written when read.
Reset to 0.
Writing 1 to and of these bits configures the corresponding
GPIO[3:0] pin as bidirectional. The output driver is enabled and
drives the value set in the output data register (65h). Writing 0 to this
register has no effect and will reflect the last value written when read.
Reset to 0.
Reserved. Returns 0 when read. Reset to 0.
Reads the state of the GPIO[3:0] pins. The state is updated on the PCI
clock following a change in the GPIO[3:0] pins.
Description
If either bit is 0, then S_CLKOUT [0] is enabled.
If both bits are 1, then S_CLKOUT [0] is disabled.
If either bit is 0, then S_CLKOUT [1] is enabled.
If both bits are 1, then S_CLKOUT [1] is disabled.
If either bit is 0, then S_CLKOUT [2] is enabled.
If both bits are 1, then S_CLKOUT [2] is disabled.
If either bit is 0, then S_CLKOUT [3] is enabled.
If both bits are 1, then S_CLKOUT [3] is disabled.
If bit is 0, then S_CLKOUT [4] is enabled.
If bit is 1, then S_CLKOUT [4] is disabled and driven low.
If bit is 0, then S_CLKOUT [5] is enabled.
If bit is 1, then S_CLKOUT [5] is disabled and driven low.
If bit is 0, then S_CLKOUT [6] is enabled.
If bit is 1, then S_CLKOUT [6] is disabled and driven low.
If bit is 0, then S_CLKOUT [7] is enabled.
If bit is 1, then S_CLKOUT [7] is disabled and driven low.
If bit is 0, then S_CLKOUT [8] is enabled.
If bit is 1, then S_CLKOUT [8] is disabled and driven low.
If bit is 0, then S_CLKOUT [9] is enabled.
If bit is 1, then S_CLKOUT [9] is disabled and driven low.
Reserved. Returns 00 when read.
ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
April 2009 – Revision 1.08
PI7C8150B