MT46H8M32LFB5-6:H Micron Technology Inc, MT46H8M32LFB5-6:H Datasheet - Page 73

IC SDRAM 256MB 166MHZ 90VFBGA

MT46H8M32LFB5-6:H

Manufacturer Part Number
MT46H8M32LFB5-6:H
Description
IC SDRAM 256MB 166MHZ 90VFBGA
Manufacturer
Micron Technology Inc
Series
-r
Type
DDR SDRAMr
Datasheets

Specifications of MT46H8M32LFB5-6:H

Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
256M (8Mx32)
Speed
166MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
0°C ~ 70°C
Package / Case
90-VFBGA
Organization
8Mx32
Density
256Mb
Address Bus
14b
Access Time (max)
6.5/5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
120mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT46H8M32LFB5-6:H
Manufacturer:
ST
Quantity:
34 600
Part Number:
MT46H8M32LFB5-6:H
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Figure 35: Consecutive WRITE-to-WRITE
Figure 36: Nonconsecutive WRITE-to-WRITE
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. I 09/10 EN
Command
Command
Address
Address
DQS
DQS
DQ
DQ
CK#
CK#
DM
DM
CK
CK
3
3
Notes:
Notes:
WRITE
WRITE
Bank,
Col b
Bank,
Col b
T0
T0
1, 2
t
1. Each WRITE command can be to any bank.
2. An uninterrupted burst of 4 is shown.
3. D
1, 2
1. Each WRITE command can be to any bank.
2. An uninterrupted burst of 4 is shown.
3. D
t
DQSS (NOM)
DQSS (NOM)
IN
IN
b (n) = data-in for column b (n).
b (n) = data-in for column b (n).
NOP
NOP
D
D
T1
T1
b
b
IN
IN
T1n
T1n
b+1
b+1
D
D
IN
IN
WRITE
Bank,
Col n
b+2
b+2
D
NOP
D
T2
T2
IN
IN
1, 2
73
T2n
b+3
T2n
b+3
D
D
IN
IN
256Mb: x16, x32 Mobile LPDDR SDRAM
WRITE
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Bank,
NOP
Col n
D
T3
T3
n
IN
1,2
Don’t Care
Don’t Care
T3n
n+1
D
IN
n+2
NOP
D
D
T4
T4
NOP
n
IN
IN
T4n
T4n
n+1
n+3
D
D
IN
IN
Transitioning Data
Transitioning Data
© 2008 Micron Technology, Inc. All rights reserved.
WRITE Operation
n+2
D
T5
NOP
T5
NOP
IN
T5n
n+3
D
IN

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